From patchwork Thu Aug 29 11:33:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 19613 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-gh0-f197.google.com (mail-gh0-f197.google.com [209.85.160.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id ED1C8246C2 for ; Thu, 29 Aug 2013 11:51:09 +0000 (UTC) Received: by mail-gh0-f197.google.com with SMTP id r20sf301530ghr.0 for ; Thu, 29 Aug 2013 04:51:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=mime-version:x-gm-message-state:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=Sw67oGbStIUtFoegKMbD3NX320ofwXDEs/q7iM/o2CM=; b=cWlgvg8KNN0L5YyHnobazGStHvfABKMmktd/l4gfgVSXov3btYC6hw+RjDBq42i/4C D0yg74R8U/fqOv6DR6Zv+Tdy25j2Y9uwLONdpXF4xnR41yQwVbArJQ8cg38psgGjjDCZ dfVtnLXmKnjh1bHi1mTcxHne9erPUQM0xPTyJqMzok4y35ugTLfhTpv2urQR5pUCa2Tg vBy8nGwdkON/QwI3Cix0imirNkeiD4uApbRaZH2cKcbT24H5Schll4Fic2xuHxDxfLg2 ai6VpR9doKLJmZpAiwYa1hYFwwZBir8+qJfr/ofD0Pkj0a2+HkTBqY+M00Q8u2TGH/bg svxg== X-Received: by 10.236.140.130 with SMTP id e2mr1083906yhj.10.1377777069754; Thu, 29 Aug 2013 04:51:09 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.48.49 with SMTP id i17ls815118qen.44.gmail; Thu, 29 Aug 2013 04:51:09 -0700 (PDT) X-Received: by 10.58.127.202 with SMTP id ni10mr634071veb.27.1377777069668; Thu, 29 Aug 2013 04:51:09 -0700 (PDT) Received: from mail-ve0-f174.google.com (mail-ve0-f174.google.com [209.85.128.174]) by mx.google.com with ESMTPS id sk7si7953231vdc.129.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 29 Aug 2013 04:51:09 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.174; Received: by mail-ve0-f174.google.com with SMTP id d10so214473vea.33 for ; Thu, 29 Aug 2013 04:51:09 -0700 (PDT) X-Gm-Message-State: ALoCoQkNBG64Ny+oDkPoEYB0rcMFLqsyDy2OvhbjSUytZM3LUmueABCDEAZdZ98X7MQVnHgAya66 X-Received: by 10.58.165.70 with SMTP id yw6mr2833359veb.19.1377777069557; Thu, 29 Aug 2013 04:51:09 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp17346vcz; Thu, 29 Aug 2013 04:51:08 -0700 (PDT) X-Received: by 10.68.136.7 with SMTP id pw7mr3140700pbb.106.1377777068142; Thu, 29 Aug 2013 04:51:08 -0700 (PDT) Received: from mail-pa0-f44.google.com (mail-pa0-f44.google.com [209.85.220.44]) by mx.google.com with ESMTPS id yk3si24796955pac.128.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 29 Aug 2013 04:51:08 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.44 is neither permitted nor denied by best guess record for domain of sachin.kamat@linaro.org) client-ip=209.85.220.44; Received: by mail-pa0-f44.google.com with SMTP id fz6so825282pac.17 for ; Thu, 29 Aug 2013 04:51:07 -0700 (PDT) X-Received: by 10.66.155.102 with SMTP id vv6mr3956240pab.89.1377777067517; Thu, 29 Aug 2013 04:51:07 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id xl3sm37546899pbb.17.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 29 Aug 2013 04:51:06 -0700 (PDT) From: Sachin Kamat To: devicetree@vger.kernel.org Cc: rob.herring@calxeda.com, swarren@wwwdotorg.org, pawel.moll@arm.com, mark.rutland@arm.com, ian.campbell@citrix.com, sachin.kamat@linaro.org, kgene.kim@samsung.com, patches@linaro.org Subject: [PATCH v2 2/2] usb: phy: samsung: Update usbphy documentation Date: Thu, 29 Aug 2013 17:03:26 +0530 Message-Id: <1377776006-22972-2-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1377776006-22972-1-git-send-email-sachin.kamat@linaro.org> References: <1377776006-22972-1-git-send-email-sachin.kamat@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: sachin.kamat@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Updated the documentation as per the latest driver implementation. While at it also fixed some trivial typos. Signed-off-by: Sachin Kamat Acked-by: Felipe Balbi --- .../devicetree/bindings/usb/samsung-usbphy.txt | 53 ++++++++------------ 1 file changed, 22 insertions(+), 31 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt index 33fd354..a088a30 100644 --- a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt @@ -1,40 +1,35 @@ SAMSUNG USB-PHY controllers -** Samsung's usb 2.0 phy transceiver +** Samsung USB 2.0 phy transceiver -The Samsung's usb 2.0 phy transceiver is used for controlling -usb 2.0 phy for s3c-hsotg as well as ehci-s5p and ohci-exynos -usb controllers across Samsung SOCs. +The Samsung USB 2.0 phy transceiver is used for controlling +USB 2.0 phy for s3c-hsotg as well as ehci-s5p and ohci-exynos +USB controllers across Samsung SOCs. TODO: Adding the PHY binding with controller(s) according to the under development generic PHY driver. Required properties: -Exynos4210: -- compatible : should be "samsung,exynos4210-usb2phy" -- reg : base physical address of the phy registers and length of memory mapped +- compatible: value should be one among the following: + (a) "samsung,s3c64xx-usb2phy" for S3C64xx SoCs + (b) "samsung,exynos4210-usb2phy" for Exynos4210 SoC + (c) "samsung,exynos4x12-usb2phy" for Exynos4x12 SoCs + (d) "samsung,exynos5250-usb2phy" for Exynos5250 SoC +- reg: base physical address of the phy registers and length of memory mapped region. - clocks: Clock IDs array as required by the controller. -- clock-names: names of clock correseponding IDs clock property as requested - by the controller driver. - -Exynos5250: -- compatible : should be "samsung,exynos5250-usb2phy" -- reg : base physical address of the phy registers and length of memory mapped - region. +- clock-names: shall be "usbhost" for Exynos5250 and "otg" for others. Optional properties: -- #address-cells: should be '1' when usbphy node has a child node with 'reg' - property. -- #size-cells: should be '1' when usbphy node has a child node with 'reg' - property. +- #address-cells: should be '1'. +- #size-cells: should be '1'. - ranges: allows valid translation between child's address space and parent's address space. - The child node 'usbphy-sys' to the node 'usbphy' is for the system controller interface for usb-phy. It should provide the following information required by usb-phy controller to control phy. - - reg : base physical address of PHY_CONTROL registers. + - reg: base physical address of PHY_CONTROL registers. The size of this register is the total sum of size of all PHY_CONTROL registers that the SoC has. For example, the size will be '0x4' in case we have only one PHY_CONTROL register (e.g. @@ -62,28 +57,24 @@ Example: }; }; +** Samsung USB 3.0 phy transceiver -** Samsung's usb 3.0 phy transceiver - -Starting exynso5250, Samsung's SoC have usb 3.0 phy transceiver -which is used for controlling usb 3.0 phy for dwc3-exynos usb 3.0 +Starting Exynos5250, Samsung SoCs have USB 3.0 phy transceiver +which is used for controlling USB 3.0 phy for dwc3-exynos USB 3.0 controllers across Samsung SOCs. Required properties: Exynos5250: -- compatible : should be "samsung,exynos5250-usb3phy" -- reg : base physical address of the phy registers and length of memory mapped +- compatible: should be "samsung,exynos5250-usb3phy" +- reg: base physical address of the phy registers and length of memory mapped region. - clocks: Clock IDs array as required by the controller. -- clock-names: names of clocks correseponding to IDs in the clock property - as requested by the controller driver. +- clock-names: shall be "usbdrd30". Optional properties: -- #address-cells: should be '1' when usbphy node has a child node with 'reg' - property. -- #size-cells: should be '1' when usbphy node has a child node with 'reg' - property. +- #address-cells: should be '1'. +- #size-cells: should be '1'. - ranges: allows valid translation between child's address space and parent's address space.