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[209.132.180.67]) by mx.google.com with ESMTP id z20si29932139pgu.43.2019.04.10.00.23.19; Wed, 10 Apr 2019 00:23:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HT2F+L2G; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728888AbfDJHXT (ORCPT + 7 others); Wed, 10 Apr 2019 03:23:19 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:35738 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727256AbfDJHXT (ORCPT ); Wed, 10 Apr 2019 03:23:19 -0400 Received: by mail-pg1-f194.google.com with SMTP id g8so1011246pgf.2 for ; Wed, 10 Apr 2019 00:23:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=IyLTTyJEtgA+Hevwz2wGkZkZqjm4Ms8sZpRlR1WnhEc=; b=HT2F+L2GVnlEGqomVZ4A3sVgTiy0jmlyDZs4GBhK+9QMoEvtu0VBiv2GvQJmDvBGGL 6zFxddfh5ls2dXqSt+CnIHX+Ncb9sTdH2luvh/mEaSDb+/e60FiHibOxv2nYmbedqlgw wihrM0HbZHYdKkZlHHFM1qD9hy9dWmJeZd5BDbkyQFqzaIgtrthkItIexHSk3/2s7kZ+ FFtn6bfFNdBLmaGvfni4AgA1ejvcrrHnj9sqDcdK0VE3wjRUrUOOnz9gxKJD/5xREP4e giKwF6GfBEu84ymgYKocaN112MQgB72+/8KUqZXqHRo+vmlY78TJnTcWnPiLMg7EISJj h/uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=IyLTTyJEtgA+Hevwz2wGkZkZqjm4Ms8sZpRlR1WnhEc=; b=p9AjPOgL9/30v8Fz/fOy/4gFEpQ8OqGhq0AtSDqFRjNovHU3SjnnKnG2CNM9/s/dgs jvMMaUOcdF3u73ARo4/TwSpOOhe8wFH/ndVi5CCDCbuB2i0HiSRoNXqr9aZ2cHqJGzF6 8XL4GE+5dhyHmZZ7HU0IrSlNlZg0YMFSilankrvP6kj4YUpRcs+oA0QKBCLbeCXwC8Y+ VzpDCUmS86tfuB7BROxKA6bzGoEM86wL6+vlfhDDOI7HiVvsXo3ODJ9gyWT/TCEFdCmA SrFeZscp0UJ9BxBiiC+/s3EuHEdW8l5ruZncokptz/G/v4bqw2Y9IDm6OTsTlkqQGs6O 57sA== X-Gm-Message-State: APjAAAUf2rMo8JBPw7frlz9sLOzpirHZcJR2tFKS8kLXn8SpB9ESwc8O G/UPL9+2aohd3Tn/us871J911w== X-Received: by 2002:a63:570d:: with SMTP id l13mr39297636pgb.55.1554880997864; Wed, 10 Apr 2019 00:23:17 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id s19sm49163542pfe.74.2019.04.10.00.23.13 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 10 Apr 2019 00:23:16 -0700 (PDT) From: Baolin Wang To: arnd@arndb.de, robh+dt@kernel.org, mark.rutland@arm.com Cc: olof@lixom.net, arm@kernel.org, linux-arm-kernel@lists.infradead.org, orsonzhai@gmail.com, baolin.wang@linaro.org, zhang.lyra@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: sprd: Add clock properties for serial devices Date: Wed, 10 Apr 2019 15:22:50 +0800 Message-Id: <1246f7a9ce912458ea3b889b0c0e392897a664c8.1554879978.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We've introduced power management logics for the Spreadtrum serial controller by commit 062ec2774c8a ("serial: sprd: Add power management for the Spreadtrum serial controller"), thus add related clock properties to support this feature. Signed-off-by: Baolin Wang --- arch/arm64/boot/dts/sprd/whale2.dtsi | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) -- 1.7.9.5 diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index 34b6ca0..b5c5dce 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -75,7 +75,9 @@ "sprd,sc9836-uart"; reg = <0x0 0x100>; interrupts = ; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART0_EB>, + <&ap_clk CLK_UART0>, <&ext_26m>; status = "disabled"; }; @@ -84,7 +86,9 @@ "sprd,sc9836-uart"; reg = <0x100000 0x100>; interrupts = ; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART1_EB>, + <&ap_clk CLK_UART1>, <&ext_26m>; status = "disabled"; }; @@ -93,7 +97,9 @@ "sprd,sc9836-uart"; reg = <0x200000 0x100>; interrupts = ; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART2_EB>, + <&ap_clk CLK_UART2>, <&ext_26m>; status = "disabled"; }; @@ -102,7 +108,9 @@ "sprd,sc9836-uart"; reg = <0x300000 0x100>; interrupts = ; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART3_EB>, + <&ap_clk CLK_UART3>, <&ext_26m>; status = "disabled"; }; };