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[217.226.147.182]) by smtp.gmail.com with ESMTPSA id r3sm2416655ejy.95.2020.08.12.15.41.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2020 15:41:54 -0700 (PDT) Received: from chuck by debian64.daheim with local (Exim 4.94) (envelope-from ) id 1k5zRR-005oDV-Sc; Thu, 13 Aug 2020 00:41:53 +0200 From: Christian Lamparter To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org Cc: Chris Blake , Paul Mackerras , Benjamin Herrenschmidt , Michael Ellerman , Rob Herring Subject: [RFC PATCH v1 2/4] powerpc: apm82181: add WD MyBook Live NAS Date: Thu, 13 Aug 2020 00:41:51 +0200 Message-Id: <08dd11e8ce996a0df27dca3a9316bfc4ede0d0d0.1597271958.git.chunkeey@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <15a94dddc15d29bac02439beb77fd066771c747a.1597271958.git.chunkeey@gmail.com> References: <15a94dddc15d29bac02439beb77fd066771c747a.1597271958.git.chunkeey@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the device-tree definitions for Western Digital MyBook Live NAS devices. Technically, this devicetree file is shared by two, very similar devices. There's the My Book Live and the My Book Live Duo. WD's uboot on the device will enable/disable the nodes for the device. Ready to go images and install instruction can be found @OpenWrt.org Signed-off-by: Christian Lamparter --- arch/powerpc/boot/dts/wd-mybooklive.dts | 199 +++++++++++++++++++++ arch/powerpc/platforms/44x/ppc44x_simple.c | 3 +- 2 files changed, 201 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/boot/dts/wd-mybooklive.dts diff --git a/arch/powerpc/boot/dts/wd-mybooklive.dts b/arch/powerpc/boot/dts/wd-mybooklive.dts new file mode 100644 index 000000000000..0871cc17bc9d --- /dev/null +++ b/arch/powerpc/boot/dts/wd-mybooklive.dts @@ -0,0 +1,199 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2008 DENX Software Engineering, Stefan Roese + * (c) Copyright 2010 Western Digital Technologies, Inc. All Rights Reserved. + */ + +/dts-v1/; + +#include "apm82181.dtsi" + +/ { + compatible = "wd,mybooklive"; + model = "MyBook Live"; + + aliases { + serial0 = &UART0; + }; +}; + +&POB0 { + ebc { + nor_flash@0,0 { + status = "okay"; + compatible = "amd,s29gl512n", "jedec-probe", "cfi-flash", "mtd-rom"; + bank-width = <1>; + reg = <0x00000000 0x00000000 0x00080000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* Part of bootrom - Don't use it without a jump */ + label = "free"; + reg = <0x00000000 0x0001e000>; + }; + + partition@1e000 { + label = "env"; + reg = <0x0001e000 0x00002000>; + }; + + partition@20000 { + label = "uboot"; + reg = <0x00020000 0x00050000>; + }; + }; + }; + + GPIO1: gpio@e0000000 { + compatible = "wd,mbl-gpio"; + reg-names = "dat"; + reg = <0xe0000000 0x1>; + #gpio-cells = <2>; + gpio-controller; + + enable-button { + /* Defined in u-boot as: NOT_NOR + * "enables features other than NOR + * specifically, the buffer at CS2" + * (button). + * + * Note: This option is disabled as + * it prevents the system from being + * rebooted successfully. + */ + + gpio-hog; + line-name = "Enable Reset Button, disable NOR"; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-low; + }; + }; + + GPIO2: gpio@e0100000 { + compatible = "wd,mbl-gpio"; + reg-names = "dat"; + reg = <0xe0100000 0x1>; + #gpio-cells = <2>; + gpio-controller; + no-output; + }; + + leds { + compatible = "gpio-leds"; + + failsafe: power-red { + label = "mbl:red:power"; + gpios = <&GPIO1 4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "panic"; + }; + + status: power-green { + label = "mbl:green:power"; + gpios = <&GPIO1 5 GPIO_ACTIVE_HIGH>; + }; + + power-blue { + label = "mbl:blue:power"; + gpios = <&GPIO1 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "disk-activity"; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <60>; /* 3 * 20 = 60ms */ + autorepeat; + + reset-button { + label = "Reset button"; + linux,code = ; + gpios = <&GPIO2 2 GPIO_ACTIVE_LOW>; + }; + }; + + usbpwr: usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "Power USB Core"; + gpios = <&GPIO1 2 GPIO_ACTIVE_LOW>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + sata1pwr: sata1-regulator { + compatible = "regulator-fixed"; + regulator-name = "Power Drive Port 1"; + gpios = <&GPIO1 3 GPIO_ACTIVE_LOW>; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; /* needed to read OS from HDD */ + }; + + sata0pwr: sata0-regulator { + compatible = "regulator-fixed"; + regulator-name = "Power Drive Port 0"; + gpios = <&GPIO1 7 GPIO_ACTIVE_LOW>; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; /* needed to read OS from HDD */ + }; +}; + +&EMAC0 { + status = "okay"; + + phy-map = <0x2>; + phy-address = <0x1>; + phy-handle = <&phy>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&GPIO1 0 GPIO_ACTIVE_LOW>; + + phy: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; +}; + +&CRYPTO { + status = "okay"; +}; + +&PKA { + status = "okay"; +}; + +&TRNG { + status = "okay"; +}; + +&SATA0 { + status = "okay"; + + drive0: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; +}; + +&SATA1 { + status = "okay"; + + drive1: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; +}; + +&UART0 { + status = "okay"; +}; + +&USBOTG0 { + status = "okay"; + dr_mode = "host"; + vbus-supply = <&usbpwr>; +}; diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c index 3dbd8ddd734a..1122702c804a 100644 --- a/arch/powerpc/platforms/44x/ppc44x_simple.c +++ b/arch/powerpc/platforms/44x/ppc44x_simple.c @@ -59,7 +59,8 @@ static char *board[] __initdata = { "amcc,sequoia", "amcc,taishan", "amcc,yosemite", - "mosaixtech,icon" + "mosaixtech,icon", + "wd,mybooklive", }; static int __init ppc44x_probe(void)