Toggle navigation
Patchwork
devicetree
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Series =
[v2,1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
| Archived =
No
| 3 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Search
Archived
No
Yes
Both
Delegate
------
Nobody
andy.doan@linaro.org
andy.doan@linaro.org
Apply
Patch
Series
S/W/F
Date
Submitter
Delegate
State
[v2,5/6] clk: samsung: exynos850: Add AUD and HSI main gate clocks
[v2,1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
-
-
-
2023-02-23
Sam Protsenko
Accepted
[v2,3/6] clk: samsung: clk-pll: Implement pll0818x PLL type
[v2,1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
-
-
-
2023-02-23
Sam Protsenko
Accepted
[v2,1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
[v2,1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
-
-
-
2023-02-23
Sam Protsenko
Accepted