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[v10,0/7] Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ

Message ID cover.1697162990.git.Sandor.yu@nxp.com
Headers show
Series Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ | expand

Message

Sandor Yu Oct. 13, 2023, 3:24 a.m. UTC
The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge
drivers and Cadence HDP-TX PHY(HDMI/DP) drivers for Freescale i.MX8MQ.

The patch set compose of DRM bridge drivers and PHY drivers.

Both of them need patche #1 and #2 to pass build.

DRM bridges driver patches:
  #1: drm: bridge: Cadence: Creat mhdp helper driver
  #2: phy: Add HDMI configuration options
  #3: dt-bindings: display: bridge: Add Cadence MHDP8501
  #4: drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver

PHY driver patches:
  #1: drm: bridge: Cadence: Creat mhdp helper driver
  #2: phy: Add HDMI configuration options
  #5: dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY
  #6: phy: freescale: Add DisplayPort PHY driver for i.MX8MQ
  #7: phy: freescale: Add HDMI PHY driver for i.MX8MQ

v9->v10:
- Create mhdp helper driver to replace macro functions,
move all mhdp mailbox access functions and common functions
into the helper driver.
Patch #1:drm: bridge: Cadence: Creat mhdp helper driver
it is totaly different with v9.

v8->v9:
- Remove compatible string "cdns,mhdp8501" that had removed
  from dt-bindings file in v8.
- Add Dmitry's R-b tag to patch #2
- Add Krzysztof's R-b tag to patch #3

v7->v8:
MHDP8501 HDMI/DP:
- Correct DT node name to "display-bridge".
- Remove "cdns,mhdp8501" from mhdp8501 dt-binding doc.

HDMI/DP PHY:
- Introduced functions `wait_for_ack` and `wait_for_ack_clear` to handle
  waiting with acknowledgment bits set and cleared respectively.
- Use FIELD_PRE() to set bitfields for both HDMI and DP PHY.

v6->v7:
MHDP8501 HDMI/DP:
- Combine HDMI and DP driver into one mhdp8501 driver.
  Use the connector type to load the corresponding functions.
- Remove connector init functions.
- Add <linux/hdmi.h> in phy_hdmi.h to reuse ‘enum hdmi_colorspace’.

HDMI/DP PHY:
- Lowercase hex values
- Fix parameters indent issue on some functions
- Replace ‘udelay’ with ‘usleep_range’

v5->v6:
HDMI/DP bridge driver
- 8501 is the part number of Cadence MHDP on i.MX8MQ.
  Use MHDP8501 to name hdmi/dp drivers and files. 
- Add compatible "fsl,imx8mq-mhdp8501-dp" for i.MX8MQ DP driver
- Add compatible "fsl,imx8mq-mhdp8501-hdmi" for i.MX8MQ HDMI driver
- Combine HDMI and DP dt-bindings into one file cdns,mhdp8501.yaml
- Fix HDMI scrambling is not enable issue when driver working in 4Kp60
  mode.
- Add HDMI/DP PHY API mailbox protect.

HDMI/DP PHY driver:
- Rename DP and HDMI PHY files and move to folder phy/freescale/
- Remove properties num_lanes and link_rate from DP PHY driver.
- Combine HDMI and DP dt-bindings into one file fsl,imx8mq-dp-hdmi-phy.yaml
- Update compatible string to "fsl,imx8mq-dp-phy".
- Update compatible string to "fsl,imx8mq-hdmi-phy".

v4->v5:
- Drop "clk" suffix in clock name.
- Add output port property in the example of hdmi/dp.

v3->v4:
dt-bindings:
- Correct dt-bindings coding style and address review comments.
- Add apb_clk description.
- Add output port for HDMI/DP connector
PHY:
- Alphabetically sorted in Kconfig and Makefile for DP and HDMI PHY
- Remove unused registers define from HDMI and DP PHY drivers.
- More description in phy_hdmi.h.
- Add apb_clk to HDMI and DP phy driver.
HDMI/DP:
- Use get_unaligned_le32() to replace hardcode type conversion
  in HDMI AVI infoframe data fill function.
- Add mailbox mutex lock in HDMI/DP driver for phy functions
  to reslove race conditions between HDMI/DP and PHY drivers.
- Add apb_clk to both HDMI and DP driver.
- Rename some function names and add prefix with "cdns_hdmi/cdns_dp".
- Remove bpc 12 and 16 optional that not supported.

v2->v3:
Address comments for dt-bindings files.
- Correct dts-bindings file names 
  Rename phy-cadence-hdptx-dp.yaml to cdns,mhdp-imx8mq-dp.yaml
  Rename phy-cadence-hdptx-hdmi.yaml to cdns,mhdp-imx8mq-hdmi.yaml
- Drop redundant words and descriptions.
- Correct hdmi/dp node name.

v2 is a completely different version compared to v1.
Previous v1 can be available here [1].

v1->v2:
- Reuse Cadence mailbox access functions from mhdp8546 instead of
  rockchip DP.
- Mailbox access functions be convert to marco functions
  that will be referenced by HDP-TX PHY(HDMI/DP) driver too.
- Plain bridge instead of component driver.
- Standalone Cadence HDP-TX PHY(HDMI/DP) driver.
- Audio driver are removed from the patch set, it will be add in another
  patch set later.

[1] https://patchwork.kernel.org/project/linux-rockchip/cover/cover.1590982881.git.Sandor.yu@nxp.com/

Sandor Yu (7):
  drm: bridge: Cadence: Creat mhdp helper driver
  phy: Add HDMI configuration options
  dt-bindings: display: bridge: Add Cadence MHDP8501
  drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver
  dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY
  phy: freescale: Add DisplayPort PHY driver for i.MX8MQ
  phy: freescale: Add HDMI PHY driver for i.MX8MQ

 .../display/bridge/cdns,mhdp8501.yaml         | 104 ++
 .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml  |  53 +
 drivers/gpu/drm/bridge/cadence/Kconfig        |  20 +
 drivers/gpu/drm/bridge/cadence/Makefile       |   3 +
 .../gpu/drm/bridge/cadence/cdns-mhdp-helper.c | 306 ++++++
 .../drm/bridge/cadence/cdns-mhdp8501-core.c   | 316 ++++++
 .../drm/bridge/cadence/cdns-mhdp8501-core.h   | 365 +++++++
 .../gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c | 708 +++++++++++++
 .../drm/bridge/cadence/cdns-mhdp8501-hdmi.c   | 673 ++++++++++++
 .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 383 ++-----
 .../drm/bridge/cadence/cdns-mhdp8546-core.h   |  44 +-
 drivers/phy/freescale/Kconfig                 |  20 +
 drivers/phy/freescale/Makefile                |   2 +
 drivers/phy/freescale/phy-fsl-imx8mq-dp.c     | 720 +++++++++++++
 drivers/phy/freescale/phy-fsl-imx8mq-hdmi.c   | 961 ++++++++++++++++++
 include/drm/bridge/cdns-mhdp-helper.h         |  96 ++
 include/linux/phy/phy-hdmi.h                  |  24 +
 include/linux/phy/phy.h                       |   7 +-
 18 files changed, 4443 insertions(+), 362 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml
 create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-helper.c
 create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c
 create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h
 create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c
 create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c
 create mode 100644 drivers/phy/freescale/phy-fsl-imx8mq-dp.c
 create mode 100644 drivers/phy/freescale/phy-fsl-imx8mq-hdmi.c
 create mode 100644 include/drm/bridge/cdns-mhdp-helper.h
 create mode 100644 include/linux/phy/phy-hdmi.h

Comments

Sandor Yu Oct. 16, 2023, 3:05 a.m. UTC | #1
Hi Alexander,

Thanks your comments,

> 
> Hi Sandor,
> 
> thanks for the updated series.
> 
> Am Freitag, 13. Oktober 2023, 05:24:20 CEST schrieb Sandor Yu:
> > MHDP8546 mailbox access functions will be share to other mhdp driver
> > and Cadence HDP-TX HDMI/DP PHY drivers.
> > Create a new mhdp helper driver and move all those functions into.
> >
> > cdns_mhdp_reg_write() is renamed to cdns_mhdp_dp_reg_write(), because
> > it use the DPTX command ID DPTX_WRITE_REGISTER.
> >
> > New cdns_mhdp_reg_write() is created with the general command ID
> > GENERAL_REGISTER_WRITE.
> >
> > Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
> > ---
> > v9->v10:
> >  *use mhdp helper driver to replace macro functions,  move maibox
> > access function and mhdp hdmi/dp common API  functions into the
> > driver.
> >
> >  drivers/gpu/drm/bridge/cadence/Kconfig        |   4
> >  drivers/gpu/drm/bridge/cadence/Makefile       |   1 +
> >  .../gpu/drm/bridge/cadence/cdns-mhdp-helper.c | 306 ++++++++++++++
> >  .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 383 +++---------------
> >  .../drm/bridge/cadence/cdns-mhdp8546-core.h   |  44 +-
> >  include/drm/bridge/cdns-mhdp-helper.h         |  96 +++++
> >  6 files changed, 473 insertions(+), 361 deletions(-)  create mode
> > 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-helper.c
> >  create mode 100644 include/drm/bridge/cdns-mhdp-helper.h
> >
> > diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig
> > b/drivers/gpu/drm/bridge/cadence/Kconfig index
> > ec35215a20034..0b7b4626a7af0
> > 100644
> > --- a/drivers/gpu/drm/bridge/cadence/Kconfig
> > +++ b/drivers/gpu/drm/bridge/cadence/Kconfig
> > @@ -20,6 +20,9 @@ config DRM_CDNS_DSI_J721E
> >         the routing of the DSS DPI signal to the Cadence DSI.
> >  endif
> >
> > +config CDNS_MHDP_HELPER
> > +     tristate
> > +
> >  config DRM_CDNS_MHDP8546
> >       tristate "Cadence DPI/DP bridge"
> >       select DRM_DISPLAY_DP_HELPER
> > @@ -27,6 +30,7 @@ config DRM_CDNS_MHDP8546
> >       select DRM_DISPLAY_HELPER
> >       select DRM_KMS_HELPER
> >       select DRM_PANEL_BRIDGE
> > +     select CDNS_MHDP_HELPER
> >       depends on OF
> >       help
> >         Support Cadence DPI to DP bridge. This is an internal diff
> > --git a/drivers/gpu/drm/bridge/cadence/Makefile
> > b/drivers/gpu/drm/bridge/cadence/Makefile index
> > c95fd5b81d137..087dc074820d7 100644
> > --- a/drivers/gpu/drm/bridge/cadence/Makefile
> > +++ b/drivers/gpu/drm/bridge/cadence/Makefile
> > @@ -2,6 +2,7 @@
> >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o  cdns-dsi-y :=
> > cdns-dsi-core.o
> >  cdns-dsi-$(CONFIG_DRM_CDNS_DSI_J721E) += cdns-dsi-j721e.o
> > +obj-$(CONFIG_CDNS_MHDP_HELPER) += cdns-mhdp-helper.o
> >  obj-$(CONFIG_DRM_CDNS_MHDP8546) += cdns-mhdp8546.o
> cdns-mhdp8546-y
> > := cdns-mhdp8546-core.o cdns-mhdp8546-hdcp.o
> >  cdns-mhdp8546-$(CONFIG_DRM_CDNS_MHDP8546_J721E) +=
> > cdns-mhdp8546-j721e.o diff --git
> > a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-helper.c
> > b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-helper.c new file mode
> > 100644 index 0000000000000..2e3eee40494f0
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-helper.c
> > @@ -0,0 +1,306 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2023 NXP Semiconductor, Inc.
> > + *
> > + */
> > +#include <drm/bridge/cdns-mhdp-helper.h> #include
> > +<linux/dev_printk.h> #include <linux/module.h>
> > +
> > +/* Mailbox helper functions */
> > +int cdns_mhdp_mailbox_read(struct cdns_mhdp_base *base) {
> > +     int ret, empty;
> > +
> > +     WARN_ON(!mutex_is_locked(base->mbox_mutex));
> > +
> > +     ret = readx_poll_timeout(readl, base->regs +
> CDNS_MAILBOX_EMPTY,
> > +                              empty, !empty, MAILBOX_RETRY_US,
> > +                              MAILBOX_TIMEOUT_US);
> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     return readl(base->regs + CDNS_MAILBOX_RX_DATA) & 0xff; }
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_read);
> 
> No need to export this. You can make this function actually static.

OK, I will change it to static in the next version.

> 
> > +
> > +int cdns_mhdp_mailbox_write(struct cdns_mhdp_base *base, u8 val) {
> > +     int ret, full;
> > +
> > +     WARN_ON(!mutex_is_locked(base->mbox_mutex));
> > +
> > +     ret = readx_poll_timeout(readl, base->regs + CDNS_MAILBOX_FULL,
> > +                              full, !full, MAILBOX_RETRY_US,
> > +                              MAILBOX_TIMEOUT_US);
> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     writel(val, base->regs + CDNS_MAILBOX_TX_DATA);
> > +
> > +     return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_write);
> 
> No need to export that one as well. You can make this function actually static
> as these two functions are only called from the helper itself.

mhdp8546 driver need this function. 

> 
> > +
> > +int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_base *base,
> > +                               u8 module_id, u8 opcode,
> > +                               u16 req_size) {
> > +     u32 mbox_size, i;
> > +     u8 header[4];
> > +     int ret;
> > +
> > +     /* read the header of the message */
> > +     for (i = 0; i < sizeof(header); i++) {
> > +             ret = cdns_mhdp_mailbox_read(base);
> > +             if (ret < 0)
> > +                     return ret;
> > +
> > +             header[i] = ret;
> > +     }
> > +
> > +     mbox_size = get_unaligned_be16(header + 2);
> > +
> > +     if (opcode != header[0] || module_id != header[1] ||
> > +         req_size != mbox_size) {
> > +             /*
> > +              * If the message in mailbox is not what we want, we
> > + need
> to
> > +              * clear the mailbox by reading its contents.
> > +              */
> > +             for (i = 0; i < mbox_size; i++)
> > +                     if (cdns_mhdp_mailbox_read(base) < 0)
> > +                             break;
> > +
> > +             return -EINVAL;
> > +     }
> > +
> > +     return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_recv_header);
> > +
> > +int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_base *base,
> > +                             u8 *buff, u16 buff_size) {
> > +     u32 i;
> > +     int ret;
> > +
> > +     for (i = 0; i < buff_size; i++) {
> > +             ret = cdns_mhdp_mailbox_read(base);
> > +             if (ret < 0)
> > +                     return ret;
> > +
> > +             buff[i] = ret;
> > +     }
> > +
> > +     return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_recv_data);
> > +
> > +int cdns_mhdp_mailbox_send(struct cdns_mhdp_base *base, u8
> module_id,
> > +                        u8 opcode, u16 size, u8 *message) {
> > +     u8 header[4];
> > +     int ret, i;
> > +
> > +     header[0] = opcode;
> > +     header[1] = module_id;
> > +     put_unaligned_be16(size, header + 2);
> > +
> > +     for (i = 0; i < sizeof(header); i++) {
> > +             ret = cdns_mhdp_mailbox_write(base, header[i]);
> > +             if (ret)
> > +                     return ret;
> > +     }
> > +
> > +     for (i = 0; i < size; i++) {
> > +             ret = cdns_mhdp_mailbox_write(base, message[i]);
> > +             if (ret)
> > +                     return ret;
> > +     }
> > +
> > +     return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_send);
> > +
> > +/* General helper functions */
> > +int cdns_mhdp_reg_read(struct cdns_mhdp_base *base, u32 addr, u32
> > +*value) {
> > +     u8 msg[4], resp[8];
> > +     int ret;
> > +
> > +     put_unaligned_be32(addr, msg);
> > +
> > +     mutex_lock(base->mbox_mutex);
> > +
> > +     ret = cdns_mhdp_mailbox_send(base, MB_MODULE_ID_GENERAL,
> > +                                  GENERAL_REGISTER_READ,
> > +                                  sizeof(msg), msg);
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_header(base,
> MB_MODULE_ID_GENERAL,
> > +
> GENERAL_REGISTER_READ,
> > +                                         sizeof(resp));
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_data(base, resp, sizeof(resp));
> > +     if (ret)
> > +             goto out;
> > +
> > +     /* Returned address value should be the same as requested */
> > +     if (memcmp(msg, resp, sizeof(msg))) {
> > +             ret = -EINVAL;
> > +             goto out;
> > +     }
> > +
> > +     *value = get_unaligned_be32(resp + 4);
> > +
> > +out:
> > +     mutex_unlock(base->mbox_mutex);
> > +     if (ret) {
> > +             dev_err(base->dev, "Failed to read register\n");
> > +             *value = 0;
> > +     }
> > +
> > +     return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_reg_read);
> > +
> > +int cdns_mhdp_reg_write(struct cdns_mhdp_base *base, u32 addr, u32
> > +val) {
> > +     u8 msg[8];
> > +     int ret;
> > +
> > +     put_unaligned_be32(addr, msg);
> > +     put_unaligned_be32(val, msg + 4);
> > +
> > +     mutex_lock(base->mbox_mutex);
> > +
> > +     ret = cdns_mhdp_mailbox_send(base, MB_MODULE_ID_GENERAL,
> > +                                  GENERAL_REGISTER_WRITE,
> > +                                  sizeof(msg), msg);
> > +
> > +     mutex_unlock(base->mbox_mutex);
> > +
> > +     return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_reg_write);
> > +
> > +/* DPTX helper functions */
> > +int cdns_mhdp_dp_reg_write(struct cdns_mhdp_base *base, u16 addr,
> u32
> > +val) {
> > +     u8 msg[6];
> > +     int ret;
> > +
> > +     put_unaligned_be16(addr, msg);
> > +     put_unaligned_be32(val, msg + 2);
> > +
> > +     mutex_lock(base->mbox_mutex);
> > +
> > +     ret = cdns_mhdp_mailbox_send(base, MB_MODULE_ID_DP_TX,
> > +                                  DPTX_WRITE_REGISTER,
> sizeof(msg),
> msg);
> > +
> > +     mutex_unlock(base->mbox_mutex);
> > +
> > +     return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_dp_reg_write);
> > +
> > +int cdns_mhdp_dp_reg_write_bit(struct cdns_mhdp_base *base, u16 addr,
> > +                            u8 start_bit, u8 bits_no, u32 val) {
> > +     u8 field[8];
> > +     int ret;
> > +
> > +     put_unaligned_be16(addr, field);
> > +     field[2] = start_bit;
> > +     field[3] = bits_no;
> > +     put_unaligned_be32(val, field + 4);
> > +
> > +     mutex_lock(base->mbox_mutex);
> > +
> > +     ret = cdns_mhdp_mailbox_send(base, MB_MODULE_ID_DP_TX,
> > +                                  DPTX_WRITE_FIELD,
> sizeof(field),
> field);
> > +
> > +     mutex_unlock(base->mbox_mutex);
> > +
> > +     return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_dp_reg_write_bit);
> > +
> > +int cdns_mhdp_dpcd_read(struct cdns_mhdp_base *base,
> > +                     u32 addr, u8 *data, u16 len) {
> > +     u8 msg[5], reg[5];
> > +     int ret;
> > +
> > +     put_unaligned_be16(len, msg);
> > +     put_unaligned_be24(addr, msg + 2);
> > +
> > +     mutex_lock(base->mbox_mutex);
> > +
> > +     ret = cdns_mhdp_mailbox_send(base, MB_MODULE_ID_DP_TX,
> > +                                  DPTX_READ_DPCD, sizeof(msg),
> msg);
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_header(base,
> MB_MODULE_ID_DP_TX,
> > +                                         DPTX_READ_DPCD,
> > +                                         sizeof(reg) + len);
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_data(base, reg, sizeof(reg));
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_data(base, data, len);
> > +
> > +out:
> > +     mutex_unlock(base->mbox_mutex);
> > +
> > +     return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_dpcd_read);
> > +
> > +int cdns_mhdp_dpcd_write(struct cdns_mhdp_base *base, u32 addr, u8
> > +value) {
> > +     u8 msg[6], reg[5];
> > +     int ret;
> > +
> > +     put_unaligned_be16(1, msg);
> > +     put_unaligned_be24(addr, msg + 2);
> > +     msg[5] = value;
> > +
> > +     mutex_lock(base->mbox_mutex);
> > +
> > +     ret = cdns_mhdp_mailbox_send(base, MB_MODULE_ID_DP_TX,
> > +                                  DPTX_WRITE_DPCD,
> sizeof(msg),
> msg);
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_header(base,
> MB_MODULE_ID_DP_TX,
> > +                                         DPTX_WRITE_DPCD,
> sizeof(reg));
> > +     if (ret)
> > +             goto out;
> > +
> > +     ret = cdns_mhdp_mailbox_recv_data(base, reg, sizeof(reg));
> > +     if (ret)
> > +             goto out;
> > +
> > +     if (addr != get_unaligned_be24(reg + 2))
> > +             ret = -EINVAL;
> > +
> > +out:
> > +     mutex_unlock(base->mbox_mutex);
> > +
> > +     if (ret)
> > +             dev_err(base->dev, "dpcd write failed: %d\n", ret);
> > +     return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(cdns_mhdp_dpcd_write);
> > +
> > +MODULE_DESCRIPTION("Cadence MHDP Helper driver");
> > +MODULE_AUTHOR("Sandor Yu <Sandor.yu@nxp.com>");
> > +MODULE_LICENSE("GPL");
> > [...]
> > diff --git a/include/drm/bridge/cdns-mhdp-helper.h
> > b/include/drm/bridge/cdns-mhdp-helper.h new file mode 100644 index
> > 0000000000000..b89db9e842266
> > --- /dev/null
> > +++ b/include/drm/bridge/cdns-mhdp-helper.h
> > @@ -0,0 +1,96 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2023 NXP Semiconductor, Inc.
> > + */
> > +#ifndef __CDNS_MHDP_HELPER_H__
> > +#define __CDNS_MHDP_HELPER_H__
> > +
> > +#include <asm/unaligned.h>
> > +#include <linux/iopoll.h>
> > +
> > +/* mailbox regs offset */
> > +#define CDNS_MAILBOX_FULL                    0x00008
> > +#define CDNS_MAILBOX_EMPTY                   0x0000c
> > +#define CDNS_MAILBOX_TX_DATA                 0x00010
> > +#define CDNS_MAILBOX_RX_DATA                 0x00014
> > +
> > +#define MAILBOX_RETRY_US                     1000
> > +#define MAILBOX_TIMEOUT_US                   2000000
> > +
> > +/* Module ID Code */
> > +#define MB_MODULE_ID_DP_TX                   0x01
> > +#define MB_MODULE_ID_HDMI_TX                 0x03
> > +#define MB_MODULE_ID_HDCP_TX                 0x07
> > +#define MB_MODULE_ID_HDCP_RX                 0x08
> > +#define MB_MODULE_ID_HDCP_GENERAL            0x09
> > +#define MB_MODULE_ID_GENERAL                 0x0A
> > +
> > +/* General Commands */
> > +#define GENERAL_MAIN_CONTROL                 0x01
> > +#define GENERAL_TEST_ECHO                    0x02
> > +#define GENERAL_BUS_SETTINGS                 0x03
> > +#define GENERAL_TEST_ACCESS                  0x04
> > +#define GENERAL_REGISTER_WRITE                       0x05
> > +#define GENERAL_WRITE_FIELD                  0x06
> > +#define GENERAL_REGISTER_READ                        0x07
> > +#define GENERAL_GET_HPD_STATE                        0x11
> > +
> > +/* DPTX Commands */
> > +#define DPTX_SET_POWER_MNG                   0x00
> > +#define DPTX_SET_HOST_CAPABILITIES           0x01
> > +#define DPTX_GET_EDID                                0x02
> > +#define DPTX_READ_DPCD                               0x03
> > +#define DPTX_WRITE_DPCD                              0x04
> > +#define DPTX_ENABLE_EVENT                    0x05
> > +#define DPTX_WRITE_REGISTER                  0x06
> > +#define DPTX_READ_REGISTER                   0x07
> > +#define DPTX_WRITE_FIELD                     0x08
> > +#define DPTX_TRAINING_CONTROL                        0x09
> > +#define DPTX_READ_EVENT                              0x0a
> > +#define DPTX_READ_LINK_STAT                  0x0b
> > +#define DPTX_SET_VIDEO                               0x0c
> > +#define DPTX_SET_AUDIO                               0x0d
> > +#define DPTX_GET_LAST_AUX_STAUS                      0x0e
> > +#define DPTX_SET_LINK_BREAK_POINT            0x0f
> > +#define DPTX_FORCE_LANES                     0x10
> > +#define DPTX_HPD_STATE                               0x11
> > +#define DPTX_ADJUST_LT                               0x12
> > +
> > +/* HDMI TX Commands */
> > +#define HDMI_TX_READ                         0x00
> > +#define HDMI_TX_WRITE                                0x01
> > +#define HDMI_TX_UPDATE_READ                  0x02
> > +#define HDMI_TX_EDID                         0x03
> > +#define HDMI_TX_EVENTS                               0x04
> > +#define HDMI_TX_HPD_STATUS                   0x05
> > +
> > +struct cdns_mhdp_base {
> > +     struct device *dev;
> > +     void __iomem *regs;
> > +     /* protect mailbox communications with the firmware */
> > +     struct mutex *mbox_mutex;
> > +};
> > +
> > +/* Mailbox helper functions */
> > +int cdns_mhdp_mailbox_read(struct cdns_mhdp_base *base); int
> > +cdns_mhdp_mailbox_write(struct cdns_mhdp_base *base, u8 val);
> 
> You can remove these two declarations.

cdns_mhdp_mailbox_read will be removed. Thanks!

B.R
Sandor

> 
> Best regards,
> Alexander
> 
> Best regards,
> > +int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_base *base,
> > +                               u8 module_id, u8 opcode, u16
> req_size);
> > +int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_base *base,
> > +                             u8 *buff, u16 buff_size); int
> > +cdns_mhdp_mailbox_send(struct cdns_mhdp_base *base, u8 module_id,
> > +                        u8 opcode, u16 size, u8 *message);
> > +
> > +/* General commands helper functions */ int cdns_mhdp_reg_read(struct
> > +cdns_mhdp_base *base, u32 addr, u32 *value); int
> > +cdns_mhdp_reg_write(struct cdns_mhdp_base *base, u32 addr, u32 val);
> > +
> > +/* DPTX commands helper functions */
> > +int cdns_mhdp_dp_reg_write(struct cdns_mhdp_base *base, u16 addr,
> u32
> > +val); int cdns_mhdp_dp_reg_write_bit(struct cdns_mhdp_base *base, u16
> > +addr, +
> 
> >       u8 start_bit, u8 bits_no, u32 val);
> > +int cdns_mhdp_dpcd_read(struct cdns_mhdp_base *base,
> > +                     u32 addr, u8 *data, u16 len); int
> > +cdns_mhdp_dpcd_write(struct cdns_mhdp_base *base, u32 addr, u8
> > +value);
> > +
> > +#endif /* __CDNS_MHDP_HELPER_H__ */
> 
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> 
>