From patchwork Mon Jan 15 13:20:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raphael Gallais-Pou X-Patchwork-Id: 762816 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6871E171A2; Mon, 15 Jan 2024 13:21:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="A+qk8mmf" Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40F83bTJ022593; Mon, 15 Jan 2024 14:20:25 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=selector1; bh=QjTXfvl fngBZfarYr296LTJ59DTudDegYZLTU9q1lZg=; b=A+qk8mmfAZ5G0OXG5KCZbA4 IoqoOl+4yxm+Gd0n2H+LmzjTRbGDBEJpTOvE5ccw43ygfNz2BsiPS7UDTMt36Ft8 +e/nglYGrkQRN6TumD4cpSMt7NlXbBno2QThPgXzBKV1WhfHsIj0iY4quIdi5Ldy odEto+ZQEmbqZHL80vZTdzvhCBF44raNwqUOB4NBX8PlJPY31Fz+dYnO1i5lryL5 FssiKR+urvAJCtrngXGHubn19Qy28984JgvKOOcDflRtRf70reBIOWnaH2yfcOYS PMp2Wjn/wdMKAqHomcXbQWj4JEwQM56q03G1KOCQyE2gX4qFa4toc6bYCgcw8IA= = Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3vkmbh0mu0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 15 Jan 2024 14:20:25 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2D69E10002A; Mon, 15 Jan 2024 14:20:21 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id CE3DC2831A2; Mon, 15 Jan 2024 14:20:21 +0100 (CET) Received: from localhost (10.129.178.37) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 14:20:21 +0100 From: Raphael Gallais-Pou To: Yannick Fertre , Raphael Gallais-Pou , Philippe Cornu , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel CC: , , , , Subject: [PATCH v3 0/6] Introduce STM32 LVDS driver Date: Mon, 15 Jan 2024 14:20:03 +0100 Message-ID: <20240115132009.101718-1-raphael.gallais-pou@foss.st.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 This serie introduces a new DRM bridge driver for STM32MP257 platforms based on Arm Cortex-35. It also adds an instance in the device-tree and handle the inclusion of the driver within the DRM framework. First patch adds a new panel compatible in the panel-lvds driver, which is used by default on the STM32MP257. Changes in v3: - Changed the compatible to show SoC specificity - Fixed includes in dt-binding example - Added "#clock-cells" description in dt-binding example - Some minor fixes on typo Changes in v2: - Dropped [1/8] because already merged - Dropped [4/8] since not mandatory for this serie - [1/6]: Switch compatible and clock-cells related areas - [1/6]: Remove faulty #include in the example. - [1/6]: Add missing entry in MAINTAINERS - [2/6]: Removed CamelCase macros - [2/6]: Removed hard to read debug log - [3/6]: Fixed my address - [3/6]: Fixed smatch warning - [5/6]: Move changes to stm32mp255.dtsi Raphael Gallais-Pou (6): dt-bindings: display: add dt-bindings for STM32 LVDS device drm/stm: lvds: add new STM32 LVDS Display Interface Transmitter driver drm/stm: ltdc: add lvds pixel clock arm64: dts: st: add ltdc support on stm32mp251 arm64: dts: st: add lvds support on stm32mp255 arm64: dts: st: add display support on stm32mp257f-ev .../bindings/display/st,stm32-lvds.yaml | 119 ++ MAINTAINERS | 1 + arch/arm64/boot/dts/st/stm32mp251.dtsi | 12 + arch/arm64/boot/dts/st/stm32mp255.dtsi | 17 + arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 79 ++ drivers/gpu/drm/stm/Kconfig | 11 + drivers/gpu/drm/stm/Makefile | 2 + drivers/gpu/drm/stm/ltdc.c | 19 + drivers/gpu/drm/stm/ltdc.h | 1 + drivers/gpu/drm/stm/lvds.c | 1225 +++++++++++++++++ 10 files changed, 1486 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/st,stm32-lvds.yaml create mode 100644 drivers/gpu/drm/stm/lvds.c