mbox series

[v2,0/3] clk: qcom: Add dfs support for QUPv3 RCGs on SM8150

Message ID 20240111-sm8150-dfs-support-v2-0-6edb44c83d3b@quicinc.com
Headers show
Series clk: qcom: Add dfs support for QUPv3 RCGs on SM8150 | expand

Message

Satya Priya Kakitapalli Jan. 11, 2024, 6:32 a.m. UTC 
Add dfs support and missing resets for SM8150 global clock
controller.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
---
Changes in v2:
- Use dev_err_probe instead of dev_err.
- Remove Fixes tags as there are no bug fixes, but just updates.
- Link to v1: https://lore.kernel.org/r/20240104-sm8150-dfs-support-v1-0-a5eebfdc1b12@quicinc.com

---
Satya Priya Kakitapalli (3):
      clk: qcom: gcc-sm8150: Register QUPv3 RCGs for DFS on SM8150
      dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150
      clk: qcom: gcc-sm8150: Add gcc video resets for sm8150

 drivers/clk/qcom/gcc-sm8150.c               | 352 +++++++++++++++++-----------
 include/dt-bindings/clock/qcom,gcc-sm8150.h |   3 +
 2 files changed, 215 insertions(+), 140 deletions(-)
---
base-commit: ab0b3e6ef50d305278b1971891cf1d82ab050b35
change-id: 20240104-sm8150-dfs-support-087ce1773183

Best regards,

Comments

Konrad Dybcio Jan. 13, 2024, 12:16 p.m. UTC | #1 
On 11.01.2024 07:32, Satya Priya Kakitapalli wrote:
> Add gcc video axic, axi0 and axi1 resets for the global clock
> controller on sm8150.
> 
> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
> ---

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad