From patchwork Thu Jan 4 07:21:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 760563 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E7E51DFE5; Thu, 4 Jan 2024 07:22:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=unisoc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=unisoc.com Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 4047M60j002224; Thu, 4 Jan 2024 15:22:06 +0800 (+08) (envelope-from Chunyan.Zhang@unisoc.com) Received: from SHDLP.spreadtrum.com (bjmbx02.spreadtrum.com [10.0.64.8]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4T5Ht14l0yz2QdFD2; Thu, 4 Jan 2024 15:15:21 +0800 (CST) Received: from ubt.spreadtrum.com (10.0.73.88) by BJMBX02.spreadtrum.com (10.0.64.8) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Thu, 4 Jan 2024 15:22:03 +0800 From: Chunyan Zhang To: Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [PATCH V2 0/3] Add UMS9620 clocks driver and bindings Date: Thu, 4 Jan 2024 15:21:45 +0800 Message-ID: <20240104072148.1619009-1-chunyan.zhang@unisoc.com> X-Mailer: git-send-email 2.41.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To BJMBX02.spreadtrum.com (10.0.64.8) X-MAIL: SHSQR01.spreadtrum.com 4047M60j002224 Add UMS9620 clock driver and update clock bindings for UMS9620. V2: - Fixed compile warnings reported by kernel test robot . Chunyan Zhang (3): dt-bindings: clk: sprd: Add UMS9620 support clk: sprd: Add dt-bindings include file for UMS9620 clk: sprd: add support for UMS9620 .../bindings/clock/sprd,ums512-clk.yaml | 79 +- drivers/clk/sprd/Kconfig | 9 + drivers/clk/sprd/Makefile | 1 + drivers/clk/sprd/ums9620-clk.c | 3120 +++++++++++++++++ include/dt-bindings/clock/sprd,ums9620-clk.h | 515 +++ 5 files changed, 3713 insertions(+), 11 deletions(-) create mode 100644 drivers/clk/sprd/ums9620-clk.c create mode 100644 include/dt-bindings/clock/sprd,ums9620-clk.h