| Message ID | 20231228125805.661725-1-tudor.ambarus@linaro.org |
|---|---|
| Headers | show |
| Series | GS101 Oriole: CMU_PERIC0 support and USI updates | expand |
On 12/29/23 08:04, Tudor Ambarus wrote: > > > On 12/28/23 14:04, André Draszik wrote: >> Hi Tudor, > > Hi! > >> >> On Thu, 2023-12-28 at 12:58 +0000, Tudor Ambarus wrote: >>> [...] >>> >>> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi >>> index 0e5b1b490b0b..c6ae33016992 100644 >>> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi >>> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi >>> @@ -354,6 +354,35 @@ pinctrl_peric0: pinctrl@10840000 { >>> interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>; >>> }; >>> >>> + usi8: usi@109700c0 { >>> + compatible = "google,gs101-usi", >>> + "samsung,exynos850-usi"; >>> + reg = <0x109700c0 0x20>; >>> + ranges; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>, >>> + <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>; >>> + clock-names = "pclk", "ipclk"; >> >> Given the clock-names, shouldn't the clock indices be the other way around? Also see below. > > You're right, they should have been the other way around! Didn't make > any difference at testing because the usi driver uses > clk_bulk_prepare_enable(), what matters is the order of clocks in the > i2c node, and those are fine. > >> >>> + samsung,sysreg = <&sysreg_peric0 0x101c>; >>> + status = "disabled"; >>> + >>> + hsi2c_8: i2c@10970000 { >>> + compatible = "google,gs101-hsi2c", >>> + "samsung,exynosautov9-hsi2c"; >>> + reg = <0x10970000 0xc0>; >>> + interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&hsi2c8_bus>; >>> + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>, >>> + <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>; >>> + clock-names = "hsi2c", "hsi2c_pclk"; >> >> Here, pclk == CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK (which is correct, I believe), whereas >> above pclk == CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7 >> > > Indeed, I'll reverse the order for the USI clocks and do some more > testing. Thanks! FYI, I reversed the order of the USI clocks, tested again with the eeprom at 100 KHz and 10KHz, everything went fine. I'll wait for some other feedback and probably submit a v3 next week. Cheers, ta
Add support for PERIC0 clocks. Use them for USI in serial and I2C configurations. Tested the serial at different baudrates (115200, 1M, 3M) and the I2C with an at24 eeprom, all went fine. Apart of the DT and defconfig changes, the patch set spans through the tty and clk subsystems. The expectation is that Krzysztof will apply the whole series through the Samsung SoC tree. If the tty and clk subsystem maintainers can give an acked-by or reviewed-by on the relevant patches that would be most appreciated! Thanks! ta changes in v2: - gs101 serial - infer the reg-io-width from the compatible as the entire PERIC block allows just 32-bit register accesses. - identify the critical clocks from PERIC0 and mark them accordingly (if disabled these clocks hang the system even if their parents are still enabled). - update dtsi and use USI's gate clocks instead of the dividers clocks - move hsi2c_8 cells and pinctrls into dtsi - address Sam's cosmetic changes in the device tree files - drop defconfig patches (savedefconfig output & at24 eeprom enablement) - collect Acked-by and Reviewed-by tags - changes log in each patch as well, in the comments section under ```---``` Tudor Ambarus (12): dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit dt-bindings: i2c: exynos5: add google,gs101-hsi2c compatible dt-bindings: serial: samsung: do not allow reg-io-width for gs101 tty: serial: samsung: prepare for different IO types tty: serial: samsung: set UPIO_MEM32 iotype for gs101 tty: serial: samsung: add gs101 earlycon support clk: samsung: gs101: add support for cmu_peric0 arm64: dts: exynos: gs101: remove reg-io-width from serial arm64: dts: exynos: gs101: enable cmu-peric0 clock controller arm64: dts: exynos: gs101: update USI UART to use peric0 clocks arm64: dts: exynos: gs101: define USI8 with I2C configuration arm64: dts: exynos: gs101: enable eeprom on gs101-oriole .../bindings/clock/google,gs101-clock.yaml | 25 +- .../devicetree/bindings/i2c/i2c-exynos5.yaml | 1 + .../bindings/serial/samsung_uart.yaml | 2 + .../boot/dts/exynos/google/gs101-oriole.dts | 14 + arch/arm64/boot/dts/exynos/google/gs101.dtsi | 56 +- drivers/clk/samsung/clk-gs101.c | 583 ++++++++++++++++++ drivers/tty/serial/samsung_tty.c | 58 +- include/dt-bindings/clock/google,gs101.h | 81 +++ 8 files changed, 796 insertions(+), 24 deletions(-)