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[v2,0/3] phy: qcom: qmp-pcie: Add support for G3/G4 PCIe PHY for X1E80100

Message ID 20231223-x1e80100-phy-pcie-v2-0-223c0556908a@linaro.org
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Series phy: qcom: qmp-pcie: Add support for G3/G4 PCIe PHY for X1E80100 | expand

Message

Abel Vesa Dec. 23, 2023, 11:55 a.m. UTC
This patchset adds the G4 tables and G4/G3 compatibles for X1E80100
platforms. Also adds the pciphy_v6_regs_layout to be used by the G4x2
phy and switches all the old QMP v6 PHYs to use the new regs layout.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes in v2:
- Added Krzysztof's R-b tag to first patch
- Added new patch which brings the pciephy_v6_regs_layout and made sure
  all older (existing) QMP v6 are using that.
- Switched the regs layout of the x1e80100 gen4x2 to the new
  pciephy_v6_regs_layout
- Link to v1: https://lore.kernel.org/r/20231222-x1e80100-phy-pcie-v1-0-b74ac13390bf@linaro.org

---
Abel Vesa (3):
      dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHYs
      phy: qcom: qmp-pcie: Add QMP v6 registers layout
      phy: qcom-qmp-pcie: Add support for X1E80100 g3x2 and g4x2 PCIE

 .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   |   6 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 186 ++++++++++++++++++++-
 2 files changed, 189 insertions(+), 3 deletions(-)
---
base-commit: 8a9be2a3cb673dba9d22311beb74be261f0b3f15
change-id: 20231201-x1e80100-phy-pcie-ef74adb9af30

Best regards,

Comments

Dmitry Baryshkov Dec. 24, 2023, 6:20 a.m. UTC | #1
On Sat, 23 Dec 2023 at 13:55, Abel Vesa <abel.vesa@linaro.org> wrote:
>
> Add the X1E80100 G3 and G4 configurations.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 173 +++++++++++++++++++++++++++++++
>  1 file changed, 173 insertions(+)
>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>


--
With best wishes
Dmitry
Vinod Koul Jan. 24, 2024, 6 a.m. UTC | #2
On Sat, 23 Dec 2023 13:55:20 +0200, Abel Vesa wrote:
> This patchset adds the G4 tables and G4/G3 compatibles for X1E80100
> platforms. Also adds the pciphy_v6_regs_layout to be used by the G4x2
> phy and switches all the old QMP v6 PHYs to use the new regs layout.
> 
> 

Applied, thanks!

[1/3] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHYs
      commit: e94b29f2bd73db149ce7fee9a41a7b6ca17f7918
[2/3] phy: qcom: qmp-pcie: Add QMP v6 registers layout
      commit: 70e0af37e81e8a19e207ccf14953109d793087cb
[3/3] phy: qcom-qmp-pcie: Add support for X1E80100 g3x2 and g4x2 PCIE
      commit: 606060ce8fd09891d97358e35fb2d2c00c787449

Best regards,