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[v2,0/7] i2c: stm32f7: enhancements and support for stm32mp25

Message ID 20231208164719.3584028-1-alain.volmat@foss.st.com
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Series i2c: stm32f7: enhancements and support for stm32mp25 | expand

Message

Alain Volmat Dec. 8, 2023, 4:47 p.m. UTC
This series first perform enhancements in the way interrupt are handled
and cleanup in messages.
Then it adds support for the stm32mp25 which differs in that
it only has a single irq line for both event/error and has a
different handling of the FastModePlus.
Support is then enabled within the stm32mp25 related device-trees.

Changelog:
v2: - correct st,stm32-i2c.yaml.  Use if then else scheme to indicate
      number of interrupts / interrupt-names depending on the
      compatible while keeping the description within the common part

    - correct 2 maybe-uninitialized warnings
          * ret in stm32f7_i2c_write_fm_plus_bits
          * irq_error in stm32f7_i2c_probe, move the platform_get_irq
            within the same if block as devm_request_threaded_irq

Alain Volmat (7):
  i2c: stm32f7: perform most of irq job in threaded handler
  i2c: stm32f7: simplify status messages in case of errors
  dt-bindings: i2c: document st,stm32mp25-i2c compatible
  i2c: stm32f7: add support for stm32mp25 soc
  arm64: dts: st: add all 8 i2c nodes on stm32mp251
  arm64: dts: st: add i2c2/i2c8 pins for stm32mp25
  arm64: dts: st: add i2c2 / i2c8 properties on stm32mp257f-ev1

 .../devicetree/bindings/i2c/st,stm32-i2c.yaml |  28 ++
 arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi |  36 ++
 arch/arm64/boot/dts/st/stm32mp251.dtsi        |  96 +++++
 arch/arm64/boot/dts/st/stm32mp257f-ev1.dts    |  20 ++
 drivers/i2c/busses/i2c-stm32f7.c              | 334 ++++++++++--------
 5 files changed, 357 insertions(+), 157 deletions(-)

Comments

Andi Shyti Dec. 8, 2023, 8:04 p.m. UTC | #1
Hi Alain,

On Fri, Dec 08, 2023 at 05:47:10PM +0100, Alain Volmat wrote:
> The irq handling is currently split between the irq handler
> and the threaded irq handler.  Some of the handling (such as
> dma related stuffs) done within the irq handler might sleep or
> take some time leading to issues if the kernel is built with
> realtime constraints.  In order to fix that, perform an overall
> rework to perform most of the job within the threaded handler
> and only keep fifo access in the non threaded handler.
> 
> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>

quite a difficult review because this git diff algorithm makes it
difficult to read throuhg.

But it looks like just a copy paste from to
stm32f7_i2c_isr_event() to stm32f7_i2c_isr_event_thread() of the
STM32F7_I2C_ISR_NACKF, STM32F7_I2C_ISR_STOPF, STM32F7_I2C_ISR_TC
and STM32F7_I2C_ISR_TCR.

[...]

> +static irqreturn_t stm32f7_i2c_isr_event_thread(int irq, void *data)
> +{
> +	struct stm32f7_i2c_dev *i2c_dev = data;
> +	struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
> +	struct stm32_i2c_dma *dma = i2c_dev->dma;
> +	void __iomem *base = i2c_dev->base;
> +	u32 status, mask;
> +	int ret;
> +
> +	if (!i2c_dev->master_mode)
> +		return stm32f7_i2c_slave_isr_event(i2c_dev);
> +
> +	status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);

looks to me like this readl_relaxed is read too many times during
the whole irq handling.

Reviewed-by: Andi Shyti <andi.shyti@kernel.org>

Thanks,
Andi