| Message ID | 20231208154847.130615-1-macroalpha82@gmail.com |
|---|---|
| Headers | show |
| Series | Add Support for RG-ARC Panel | expand |
On 08/12/2023 16:48, Chris Morgan wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > The Powkiddy RG-ARC is a series of 2 handheld devices, each with a 4 > inch 480x640 display. Add support for the display. > > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> > --- > drivers/gpu/drm/panel/panel-sitronix-st7701.c | 136 ++++++++++++++++++ > 1 file changed, 136 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > index 036ac403ed21..421eb4592b61 100644 > --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > @@ -423,6 +423,42 @@ static void kd50t048a_gip_sequence(struct st7701 *st7701) > 0xFF, 0xFF, 0xFF, 0xFF, 0x10, 0x45, 0x67, 0x98, 0xBA); > } > > +static void rg_arc_gip_sequence(struct st7701 *st7701) > +{ > + st7701_switch_cmd_bkx(st7701, true, 3); > + ST7701_DSI(st7701, 0xEF, 0x08); > + st7701_switch_cmd_bkx(st7701, true, 0); > + ST7701_DSI(st7701, 0xC7, 0x04); > + ST7701_DSI(st7701, 0xCC, 0x38); > + st7701_switch_cmd_bkx(st7701, true, 1); > + ST7701_DSI(st7701, 0xB9, 0x10); > + ST7701_DSI(st7701, 0xBC, 0x03); > + ST7701_DSI(st7701, 0xC0, 0x89); > + ST7701_DSI(st7701, 0xE0, 0x00, 0x00, 0x02); > + ST7701_DSI(st7701, 0xE1, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, > + 0x00, 0x00, 0x20, 0x20); > + ST7701_DSI(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); > + ST7701_DSI(st7701, 0xE3, 0x00, 0x00, 0x33, 0x00); > + ST7701_DSI(st7701, 0xE4, 0x22, 0x00); > + ST7701_DSI(st7701, 0xE5, 0x04, 0x5C, 0xA0, 0xA0, 0x06, 0x5C, 0xA0, > + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); > + ST7701_DSI(st7701, 0xE6, 0x00, 0x00, 0x33, 0x00); > + ST7701_DSI(st7701, 0xE7, 0x22, 0x00); > + ST7701_DSI(st7701, 0xE8, 0x05, 0x5C, 0xA0, 0xA0, 0x07, 0x5C, 0xA0, > + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); > + ST7701_DSI(st7701, 0xEB, 0x02, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00); > + ST7701_DSI(st7701, 0xEC, 0x00, 0x00); > + ST7701_DSI(st7701, 0xED, 0xFA, 0x45, 0x0B, 0xFF, 0xFF, 0xFF, 0xFF, > + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB0, 0x54, 0xAF); > + ST7701_DSI(st7701, 0xEF, 0x08, 0x08, 0x08, 0x45, 0x3F, 0x54); > + st7701_switch_cmd_bkx(st7701, false, 0); > + ST7701_DSI(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0x17); > + ST7701_DSI(st7701, MIPI_DCS_SET_PIXEL_FORMAT, 0x77); > + ST7701_DSI(st7701, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); > + msleep(120); > +} > + > static int st7701_prepare(struct drm_panel *panel) > { > struct st7701 *st7701 = panel_to_st7701(panel); > @@ -839,6 +875,105 @@ static const struct st7701_panel_desc kd50t048a_desc = { > .gip_sequence = kd50t048a_gip_sequence, > }; > > +static const struct drm_display_mode rg_arc_mode = { > + .clock = 25600, > + > + .hdisplay = 480, > + .hsync_start = 480 + 60, > + .hsync_end = 480 + 60 + 42, > + .htotal = 480 + 60 + 42 + 60, > + > + .vdisplay = 640, > + .vsync_start = 640 + 10, > + .vsync_end = 640 + 10 + 4, > + .vtotal = 640 + 10 + 4 + 16, > + > + .width_mm = 63, > + .height_mm = 84, > + > + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > +}; > + > +static const struct st7701_panel_desc rg_arc_desc = { > + .mode = &rg_arc_mode, > + .lanes = 2, > + .format = MIPI_DSI_FMT_RGB888, > + .panel_sleep_delay = 80, > + > + .pv_gamma = { > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0x01) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0x16), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1d), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0e), > + > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x12), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x06), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x0c), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x0a), > + > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x09), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x25), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x00), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x03), > + > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x00), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x3f), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3f), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1c) > + }, > + .nv_gamma = { > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0x01) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0x16), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1e), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0e), > + > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x11), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x06), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x0c), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x08), > + > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x09), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x26), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x00), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x15), > + > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x00), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x3f), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3f), > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1c) > + }, > + .nlinv = 0, > + .vop_uv = 4500000, > + .vcom_uv = 762500, > + .vgh_mv = 15000, > + .vgl_mv = -9510, > + .avdd_mv = 6600, > + .avcl_mv = -4400, > + .gamma_op_bias = OP_BIAS_MIDDLE, > + .input_op_bias = OP_BIAS_MIN, > + .output_op_bias = OP_BIAS_MIN, > + .t2d_ns = 1600, > + .t3d_ns = 10400, > + .eot_en = true, > + .gip_sequence = rg_arc_gip_sequence, > +}; > + > static int st7701_dsi_probe(struct mipi_dsi_device *dsi) > { > const struct st7701_panel_desc *desc; > @@ -917,6 +1052,7 @@ static void st7701_dsi_remove(struct mipi_dsi_device *dsi) > } > > static const struct of_device_id st7701_of_match[] = { > + { .compatible = "anbernic,rg-arc-panel", .data = &rg_arc_desc }, > { .compatible = "densitron,dmt028vghmcmi-1a", .data = &dmt028vghmcmi_1a_desc }, > { .compatible = "elida,kd50t048a", .data = &kd50t048a_desc }, > { .compatible = "techstar,ts8550b", .data = &ts8550b_desc }, Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Hi, On Fri, 08 Dec 2023 09:48:44 -0600, Chris Morgan wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > Add support for the Anbernic RG-ARC display panel as used in the > RG-ARC S and RG-ARC D handheld gaming devices from Anbernic. > > Chris Morgan (3): > drm/panel: st7701: Fix AVCL calculation > dt-bindings: display: st7701: Add Anbernic RG-ARC panel > drm/panel: st7701: Add Anbernic RG-ARC Panel Support > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) [1/3] drm/panel: st7701: Fix AVCL calculation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=799825aa87200ade1ba21db853d1c2ff720dcfe0 [2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel https://cgit.freedesktop.org/drm/drm-misc/commit/?id=acbf9184a87d5d6868809baa3a6c7d0537d1f321 [3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support https://cgit.freedesktop.org/drm/drm-misc/commit/?id=a7890252c1a314654862944cf4733e4333b76e25
On Fri, Dec 8, 2023 at 4:48 PM Chris Morgan <macroalpha82@gmail.com> wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > The AVCL register, according to the datasheet, comes in increments > of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented > by 0x3). The current calculation is done by adding the defined > AVCL value in mV to -4400 and then dividing by 200 to get the register > value. Unfortunately if I subtract -4400 from -4400 I get -8800, which > divided by 200 gives me -44. If I instead subtract -4400 from -4400 > I get 0, which divided by 200 gives me 0. Based on the datasheet this > is the expected register value. > > Fixes: 83b7a8e7e88e ("drm/panel/panel-sitronix-st7701: Parametrize voltage and timing") > > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Good catch! Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
From: Chris Morgan <macromorgan@hotmail.com> Add support for the Anbernic RG-ARC display panel as used in the RG-ARC S and RG-ARC D handheld gaming devices from Anbernic. Chris Morgan (3): drm/panel: st7701: Fix AVCL calculation dt-bindings: display: st7701: Add Anbernic RG-ARC panel drm/panel: st7701: Add Anbernic RG-ARC Panel Support .../display/panel/sitronix,st7701.yaml | 1 + drivers/gpu/drm/panel/panel-sitronix-st7701.c | 138 +++++++++++++++++- 2 files changed, 138 insertions(+), 1 deletion(-)