From patchwork Fri Nov 24 13:17:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alvin_=C5=A0ipraga?= X-Patchwork-Id: 746885 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pqrs.dk header.i=@pqrs.dk header.b="jXzO0DrL" X-Greylist: delayed 565 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Fri, 24 Nov 2023 05:27:34 PST Received: from out-174.mta0.migadu.com (out-174.mta0.migadu.com [91.218.175.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CD962107 for ; Fri, 24 Nov 2023 05:27:32 -0800 (PST) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqrs.dk; s=key1; t=1700831882; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ZABsrju+3feVMwii1H8J45xoKumLKlmUGlla0b8ba5E=; b=jXzO0DrLUL7ua5QX/TEPywrG29VAR2py2fqQDxTQGtaD20peAMnLCYPNFuAObVRJ9HJ2c0 AWN6s9cSudgJtfBr/T8uOXmKVwnSDZvw76ufPgrlcrC9U6RnTd3agHRxehNBWezIsCsmTR PRNVRd+SUmOPj08liTSTt5qyiY2KL1zPIcaBZDaqo2QnsPjUkVoWx39t18K0xx5sgIxhAC 31bGgwBxjtNSMBWmCcgOSlVgVNgZpJ1itm3nlQEisRWPk7VzTGuVkugmYBJSe3jsmM1an8 r8M6HNmJe5LfSXytw4PhrH4W5vAAWqArUIJTkxmSVCcaxX5HqMzk1aXSFW+FpA== From: =?utf-8?q?Alvin_=C5=A0ipraga?= Subject: [PATCH v6 0/3] clk: si5351: add option to adjust PLL without glitches Date: Fri, 24 Nov 2023 14:17:41 +0100 Message-Id: <20231124-alvin-clk-si5351-no-pll-reset-v6-0-69b82311cb90@bang-olufsen.dk> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAHWiYGUC/4XPwW7CMAwG4FdBOWNkJ3FbOPEeaIeQJiMiSkvCo k2o777ApglpB46/JX+/fRPF5eCK2K1uIrsaSphSC916JezJpHcHYWxZSJSKkDSYWEMCG89QAis mSBPMMUJ2xV3BWW8smo4ZrWjGnJ0Pnw//8NbyKZTrlL8edZXu018ZByJSUm94kLxloJ+i/XzJZ TOexX256qeFl6dUDQhGcdej1Ij9uD+2f2CKH7649GfykynxlcnN9GjpaFj1fhj+m8uyfAP54jg xVQEAAA== To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Alvin_=C5=A0ipraga?= Cc: Sebastian Hesselbarth , Rabeeh Khoury , Jacob Siverskog , Sergej Sawazki , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring X-Migadu-Flow: FLOW_OUT This series intends to address a problem I had when using the Si5351A as a runtime adjustable audio bit clock. The basic issue is that the driver in its current form unconditionally resets the PLL whenever adjusting its rate. But this reset causes an unwanted ~1.4 ms LOW signal glitch in the clock output. As a remedy, a new property is added to control the reset behaviour of the PLLs more precisely. In the process I also converted the bindings to YAML. Changes: v5 -> v6: - collect Rob's Reviewed-bys - no further changes, resend only v4 -> v5: - address Rob's comments: - min/maxItems on top-level clocks: - remove unnecessary else: - remove spurious | v3 -> v4: - remove spurious | per Rob's suggestion - simplify conditional clocks/clock-names per Rob's suggestion - remove mention of clkout[0-7] still being admissible in the commit body of patch 1 - while the Linux driver still tolerates this, the new dt-bindings do not v2 -> v3: - address further comments from Rob: - drop unnecessary refs and minItems - simplify if conditions for chip variants - ignore his comment about dropping '|', as line would be >80 columns - move additionalProperties: false close to type: object - define clocks/clock-names at top-level - drop patch to dove-cubox dts per Krzysztof's comment - will send separately - collect Sebastian's Acked-by v1 -> v2: - address Rob's comments on the two dt-bindings patches - new patch to correct the clock node names in the only upstream device tree using si5351 --- Alvin Šipraga (3): dt-bindings: clock: si5351: convert to yaml dt-bindings: clock: si5351: add PLL reset mode property clk: si5351: allow PLLs to be adjusted without reset .../devicetree/bindings/clock/silabs,si5351.txt | 126 ---------- .../devicetree/bindings/clock/silabs,si5351.yaml | 265 +++++++++++++++++++++ drivers/clk/clk-si5351.c | 47 +++- include/linux/platform_data/si5351.h | 2 + 4 files changed, 311 insertions(+), 129 deletions(-) --- base-commit: f6abdcb2444f6ebe06e19cd9eee767c7c46612ae change-id: 20231014-alvin-clk-si5351-no-pll-reset-ecfac0a6550c