From patchwork Wed Nov 22 10:45:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 746193 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Q7ZOHG1Q" Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08D80198; Wed, 22 Nov 2023 02:45:35 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AMAjJdD127773; Wed, 22 Nov 2023 04:45:19 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1700649920; bh=e+lEpcGRYl3Tb76nO14RLpG8f70M6EixwdVRMkENcVU=; h=From:To:CC:Subject:Date; b=Q7ZOHG1Q4yvYA/TxxSMXBNcXzPYCsfczYjP90c3Qx+ZYZmxZqf0kObJWLQpPbVBao NgiKKSN89rvdX0FkMLTNTqv+CQBVvSAqONY2YdJfUhOVhKaE9Ras2IDFcJvGwUH9vn rph0IvZ/q+Us+gmPRvq+Byx50H3bzsl3dcDiX+lM= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3AMAjJq8078322 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Nov 2023 04:45:19 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 22 Nov 2023 04:45:19 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 22 Nov 2023 04:45:19 -0600 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AMAjErt018560; Wed, 22 Nov 2023 04:45:14 -0600 From: Neha Malcom Francis To: , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v7 0/4] Add TPS6594 PMIC support on several boards Date: Wed, 22 Nov 2023 16:15:09 +0530 Message-ID: <20231122104513.2335757-1-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 TPS6594 is a Power Management IC which provides regulators and others features like GPIOs, RTC, watchdog, ESMs (Error Signal Monitor), and PFSM (Pre-configurable Finite State Machine). The SoC and the PMIC can communicate through the I2C or SPI interfaces. TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives. This series adds device tree nodes for TI TPS6594 PMICs found in the following boards: - J721EXSOMXEVM: Link: https://www.ti.com/tool/J721EXSOMXEVM - J721S2XSOMXEVM: Link: https://www.ti.com/tool/J721S2XSOMXEVM - J7200XSOMXEVM: Link: https://www.ti.com/tool/J7200XSOMXEVM - J784S4XEVM Link: https://www.ti.com/tool/J784S4XEVM Boot Logs: https://gist.github.com/nehamalcom/384cf594e37739a34f8a08664830e37a --- Changes from v6: https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/ - Modify patch series to include only patches not merged (J7) - Add boot logs for all affected boards Changes from v5: https://lore.kernel.org/all/20230809-tps6594-v5-0-485fd3d63670@ti.com - Range-diff: http://0x0.st/H_fD.diff - Reword the patch fixing interrupt ranges for mcu domain gpio intr, and add Fixes: tag - Also fix interrupt ranges for main domain gpio intr in the same patch - Change pinctrl node names to end in -pins to fix dtbs_check warnings - (New Patch) Enable TPS6594 in defconfig Changes from v4: https://lore.kernel.org/all/20230727130908.10656-1-eblanc@baylibre.com/ - Range-diff: https://0x0.st/H_L7.diff - Rebased on top of linux-next - Fix min voltage on vdd_usb_3v3 regulator (ldo2) on j721e-som - Use 3-hex-digit format for pinctrl values Changes from v3: https://lore.kernel.org/all/20230417154832.216774-1-eblanc@baylibre.com/ - Rebased on top of v6.5-rc1. - Change pinctrl number for irq pin as wkup_pmx0 was split on some boards. - Use already present wkup_i2c0 node instead of creating a new one. Changes from v2: https://lore.kernel.org/lkml/20230414112843.1358067-1-eblanc@baylibre.com/ - Change node name as per Krzysztof review. - Add a fix for the interrupt range of wakeup gpio used by TPS6594 pmic on J784S4. The interruptions of the PMIC were not working before that. - Remove dependencies on other patch series as that was a mistake, see https://lore.kernel.org/lkml/CRYY2V3HJ0CP.96JQ18PLZB3C@burritosblues/ Changes from v1: https://lore.kernel.org/lkml/20230329142948.833800-1-eblanc@baylibre.com/ - Harmonize regulators names across the different boards. - Adjust AVS voltage range. - Remove some outdated comments. - Add PMIC to J784S4 board. - Compatible string modified to match dt-bindings. - Add gpio-controller and gpio-cells properties. Esteban Blanc (2): arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family PMICs arm64: dts: ti: k3-j721s2-som-p0: Add TP6594 family PMICs Jerome Neanne (2): arm64: dts: ti: k3-j721e-som-p0: Add TP6594 family PMICs arm64: dts: ti: k3-j784s4-evm: Add support for TPS6594 PMIC arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 157 +++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 163 +++++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 199 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 104 ++++++++++ 4 files changed, 623 insertions(+)