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([2a01:e0a:999:a3a0:96:820c:ecf7:a817]) by smtp.gmail.com with ESMTPSA id fj7-20020a05600c0c8700b0040772138bb7sm9873393wmb.2.2023.10.17.06.15.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 06:15:25 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Albert Ou , Jonathan Corbet , Andrew Jones , Evan Green , Conor Dooley , Samuel Ortiz Subject: [PATCH v2 00/19] riscv: report more ISA extensions through hwprobe Date: Tue, 17 Oct 2023 15:14:37 +0200 Message-ID: <20231017131456.2053396-1-cleger@rivosinc.com> X-Mailer: git-send-email 2.42.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net In order to be able to gather more information about the supported ISA extensions from userspace using the hwprobe syscall, add more ISA extensions report. This series adds the following ISA extensions parsing support: - Zfh[min] - Zvfh[min] - Zihintntl - Zbc - Zvbb - Zvbc - Zvkb - Zvkg - Zvkned - Zvknh[ab] - Zvksed - Zvksh - Zvkn - Zvknc - Zvkng - Zvks - Zvksc - Zvksg - Zvkt - Zfa - Zbkb - Zbkc - Zbkx - Zknd - Zkne - Zknh - Zkr - Zksed - Zksh - Zkt Some of these extensions are actually shorthands for other "sub" extensions. This series includes a patch from Conor/Evan that adds a way to specify such "bundled" extensions. When exposing these bundled extensions to userspace through hwprobe, only the "sub" extensions are exposed. In order to test it, one can use qemu and the small hwprobe utility provided[1]. Run qemu by specifying additional ISA extensions, for instance: $ qemu-system-riscv64 -cpu rv64,v=true,zk=true,zvksh=true,zvkned=true Then, run hwprobe_dump: $ ./hwprobe_dump Base system ISA: - IMA_FD - C - V Supported extensions: - Zba - Zbb - Zbs - Zbc - Zbkb - Zbkc - Zbkx - Zknd - Zkne - Zknh - Zkt - Zvkned - Zvksh - Zihintntl - Zfa Link: https://github.com/clementleger/hwprobe_dump [1] Reviewed-by: Evan Green Reviewed-by: Evan Green Reviewed-by: Evan Green Reviewed-by: Evan Green --- Changes in V2: - Fix typo in first commit title (fatorize->factorize) - Add Zfa support - Fix missing uppercase for Zvkt naming in dt-bindings - Add Conor Acked-by on dt-bindings commits - Add scalar crypto support from Conor/Evan. - Use reporting of bunbled extensions for vector crypto Clément Léger (18): riscv: hwprobe: factorize hwprobe ISA extension reporting riscv: hwprobe: add support for scalar crypto ISA extensions dt-bindings: riscv: add scalar crypto ISA extensions description riscv: add ISA extension parsing for vector crypto extensions riscv: hwprobe: export vector crypto ISA extensions dt-bindings: riscv: add vector crypto ISA extensions description riscv: add ISA extension parsing for Zfh/Zfhmin riscv: hwprobe: export Zfh/Zfhmin ISA extensions dt-bindings: riscv: add Zfh[min] ISA extensions description riscv: add ISA extension parsing for Zihintntl riscv: hwprobe: export Zhintntl ISA extension dt-bindings: riscv: add Zihintntl ISA extension description riscv: add ISA extension parsing for Zvfh[min] riscv: hwprobe: export Zvfh[min] ISA extensions dt-bindings: riscv: add Zvfh[min] ISA extension description riscv: add ISA extension parsing for Zfa riscv: hwprobe: export Zfa ISA extension dt-bindings: riscv: add Zfa ISA extension description Evan Green (1): riscv: add ISA extension parsing for scalar crypto .../devicetree/bindings/riscv/extensions.yaml | 210 ++++++++++++++++++ Documentation/riscv/hwprobe.rst | 81 +++++++ arch/riscv/include/asm/hwcap.h | 33 ++- arch/riscv/include/uapi/asm/hwprobe.h | 26 +++ arch/riscv/kernel/cpufeature.c | 165 ++++++++++++-- arch/riscv/kernel/sys_riscv.c | 64 ++++-- 6 files changed, 543 insertions(+), 36 deletions(-)