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Tue, 29 Aug 2023 13:19:08 -0500 From: Tanmay Shah To: , , , , "Bjorn Andersson" , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Michal Simek CC: Conor Dooley , Radhey Shyam Pandey , Ben Levinsky , "Tanmay Shah" Subject: [PATCH v4 0/3] add zynqmp TCM bindings Date: Tue, 29 Aug 2023 11:18:57 -0700 Message-ID: <20230829181900.2561194-1-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F2:EE_|CH0PR12MB5139:EE_ X-MS-Office365-Filtering-Correlation-Id: b912a2ea-1ddc-49c1-0ff4-08dba8bc7a5c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ay0eY2NPfpEHfqO13UwpkAxZkVu2ZLzD5TZJMx0f368TaQ1xWLfs5OzfqwwUr8+m411ZsUUuO9t4X14dDequC87ozktSi2Bhcfaev11A2bceuvLvIGCFycrDSa+oTG25ebZ6Aq5sySY7vYbeDdqQbPi6XgK9giudLxlqawpDNukfk+1rOPt+gL3/S1bP0bOU2uKpRsaDlMoUI3wgi0soJPzhy4ewuB6ZPQoHwETPaD1BhbAcgNTEbL/V/LC95fBKr7WF2VGFytuv+6+uwJ1Mfxph9oUQKp1WTB4ZETPWUrEq+HYTF9TqKlEOrl2bZbt2p1WP+Al6/rWuiQ+dikFKWyt8Zi5x54K8ETfWzWee3mkSwarrIUir4p9/lv/5jsKmlmSxgZufTkx3hWuM4VtLy+St24xrjQjbRW8Q7/wk4hGrePW0bVQMspDYyeQJ1ru5MOdBNFpZPpskeiJSunHx3iMur5d+wZ0IFPDuTNmgliSO/zeHls00HxUwPYeMwRtGrEdCLxzzkQArj7FQ4T7jOhQ+nJzUmtDB9rPUFXX5BA64lw6Ab7V7Qb/2IRmxq8e2p/n63jkkiA0f3u3y1MVCxPfKTLCkScHIZXH11MkTeiS8cBDBbMY+b6StG5ZM1CcQ3F/FScA+WPBTpr+ZVeRSbWaXyeVYou5SbIIG1AnQdhcyFD3tM/Aqh5SxZ9hOcVvjQV2ZJKq6NgNugqYyvou7I+wcy7i4aOssEJEp0o09/YGPKwXMJ6/44GQtCcVTUTWmXbM/IftVCwqln4VIakMBpQH8cgLt1q7ZHeiH1UMjU0Jd1ri9bTDssRxKoVNN/XO1 X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(39860400002)(396003)(376002)(136003)(346002)(82310400011)(186009)(1800799009)(451199024)(36840700001)(40470700004)(46966006)(6666004)(83380400001)(966005)(478600001)(1076003)(26005)(426003)(336012)(2906002)(6636002)(316002)(70206006)(41300700001)(70586007)(8936002)(110136005)(54906003)(5660300002)(8676002)(44832011)(4326008)(2616005)(36756003)(40460700003)(86362001)(40480700001)(36860700001)(47076005)(81166007)(356005)(82740400003)(2101003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Aug 2023 18:19:26.1353 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b912a2ea-1ddc-49c1-0ff4-08dba8bc7a5c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F2.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5139 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Tightly-Coupled Memories(TCMs) are low-latency memory that provides predictable instruction execution and predictable data load/store timing. Each Cortex-R5F processor contains exclusive two 64 KB memory banks on the ATCM and BTCM ports, for a total of 128 KB of memory. In lockstep mode, both 128KB memory is accessible to the cluster. As per ZynqMP Ultrascale+ Technical Reference Manual UG1085, following is address space of TCM memory. The bindings in this patch series introduces properties to accommodate following address space with address translation between Linux and Cortex-R5 views. | | | | | --- | --- | --- | | *Mode* | *R5 View* | *Linux view* | Notes | | *Split Mode* | *start addr*| *start addr* | | | R5_0 ATCM (64 KB) | 0x0000_0000 | 0xFFE0_0000 | | | R5_0 BTCM (64 KB) | 0x0000_2000 | 0xFFE2_0000 | | | R5_1 ATCM (64 KB) | 0x0000_0000 | 0xFFE9_0000 | alias of 0xFFE1_0000 | | R5_1 BTCM (64 KB) | 0x0000_2000 | 0xFFEB_0000 | alias of 0xFFE3_0000 | | ___ | ___ | ___ | | | *Lockstep Mode* | | | | | R5_0 ATCM (128 KB) | 0x0000_0000 | 0xFFE0_0000 | | | R5_0 ATCM (128 KB) | 0x0002_0000 | 0xFFE2_0000 | | References: UG1085 TCM address space: https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Tightly-Coupled-Memory-Address-Map This patch series continues previous effort to upstream ZynqMP TCM bindings: Previous v3 version link: https://lore.kernel.org/all/1689964908-22371-1-git-send-email-radhey.shyam.pandey@amd.com/ Changes in v4: - Use address-cells and size-cells value 2 - Modify ranges property as per new value of address-cells and size-cells - Modify child node "reg" property accordingly - Remove previous ack for further review - Introduce device-tree change with split mode representation of r5 cluster and each corresponding TCM - Introduce corresponding driver change to use TCM Radhey Shyam Pandey (1): dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings Tanmay Shah (2): dts: zynqmp: add properties for TCM in remoteproc remoteproc: zynqmp: get TCM from device-tree .../remoteproc/xlnx,zynqmp-r5fss.yaml | 131 ++++++-- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 28 +- drivers/remoteproc/xlnx_r5_remoteproc.c | 279 ++++++++++++++---- 3 files changed, 356 insertions(+), 82 deletions(-) base-commit: 6995e2de6891c724bfeb2db33d7b87775f913ad1