| Message ID | 20230316083049.29979-1-quic_tdas@quicinc.com |
|---|---|
| Headers | show |
| Series | Add video clock controller driver for SM8450 | expand |
Hi Krzysztof, Thank you for the review. On 3/17/2023 1:04 AM, Krzysztof Kozlowski wrote: > On 16/03/2023 09:30, Taniya Das wrote: >> Add device tree bindings for the video clock controller on Qualcomm >> SM8450 platform. > > Subject: drop second/last, redundant "bindings for". The "dt-bindings" > prefix is already stating that these are bindings. > sure, will update it in the next patch. >> >> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >> --- >> .../bindings/clock/qcom,sm8450-videocc.yaml | 84 +++++++++++++++++++ >> .../dt-bindings/clock/qcom,videocc-sm8450.h | 38 +++++++++ >> 2 files changed, 122 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8450.h >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> new file mode 100644 >> index 000000000000..909da704c123 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> @@ -0,0 +1,84 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Video Clock & Reset Controller on SM8450 >> + >> +maintainers: >> + - Taniya Das <quic_tdas@quicinc.com> >> + >> +description: | >> + Qualcomm video clock control module provides the clocks, resets and power >> + domains on SM8450. >> + >> + See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h >> + >> +properties: >> + compatible: >> + const: qcom,sm8450-videocc >> + >> + clocks: >> + items: >> + - description: Video AHB clock from GCC >> + - description: Board XO source >> + >> + clock-names: >> + items: >> + - const: iface >> + - const: bi_tcxo >> + >> + power-domains: >> + maxItems: 1 >> + description: >> + A phandle and PM domain specifier for the MMCX power domain. > > Drop "A phandle and PM domain specifier for the" > Done. >> + >> + required-opps: >> + maxItems: 1 >> + description: >> + A phandle to an OPP node describing required MMCX performance point. >> + >> + '#clock-cells': >> + const: 1 >> + >> + '#reset-cells': >> + const: 1 >> + >> + '#power-domain-cells': >> + const: 1 >> + >> + reg: >> + maxItems: 1 > > That's a unusual ordering. Either order elements by name or use some > custom order... but then reg is always second property. > Will fix in the next patch set. >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - power-domains >> + - required-opps >> + - '#clock-cells' >> + - '#reset-cells' >> + - '#power-domain-cells' > > And keep same order in required. > Done. >> + >> +additionalProperties: false > > > Best regards, > Krzysztof >
Add bindings, driver and DT node for video clock controller on SM8450. Taniya Das (3): dt-bindings: clock: qcom: Add bindings for videocc on SM8450 clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450 arm64: dts: qcom: sm8450: Add video clock controller .../bindings/clock/qcom,sm8450-videocc.yaml | 84 ++++ arch/arm64/boot/dts/qcom/sm8450.dtsi | 13 + drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/videocc-sm8450.c | 464 ++++++++++++++++++ .../dt-bindings/clock/qcom,videocc-sm8450.h | 38 ++ 6 files changed, 609 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml create mode 100644 drivers/clk/qcom/videocc-sm8450.c create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8450.h -- 2.17.1