From patchwork Mon Dec 19 02:40:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiangsheng Hou X-Patchwork-Id: 635269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8FD4C46467 for ; Mon, 19 Dec 2022 02:40:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231178AbiLSCkx (ORCPT ); Sun, 18 Dec 2022 21:40:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231130AbiLSCkv (ORCPT ); Sun, 18 Dec 2022 21:40:51 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA378DC6; Sun, 18 Dec 2022 18:40:43 -0800 (PST) X-UUID: c6f786417c15441cb43942ff5b0806df-20221219 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=ICHy0x9L7FZYxDWuW2YY3FBCoGcD6xZ1gGBQdZu8k3s=; b=sIK/qWGQ1KoHQxT0TCESP4Lx7J26TvmKMmWq5L7Z1IeFO/KI8vNVepvmspEokBWLTZyrv+r25Xx6IsFwOA3r6V/YmGTPi4/vdShtaQM5mOntlGILOCAJXYigsFvWKgF1a+JZD8px260vIhEhV6eNLWNV9kcLCBnyORl2gdy5CE0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:5d3e0bad-c7c1-4149-baf2-dbcee3a0c3d3, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:70 X-CID-INFO: VERSION:1.1.14, REQID:5d3e0bad-c7c1-4149-baf2-dbcee3a0c3d3, IP:0, URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:70 X-CID-META: VersionHash:dcaaed0, CLOUDID:91e5b489-8530-4eff-9f77-222cf6e2895b, B ulkID:221219104035OWZHG0ZG,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: c6f786417c15441cb43942ff5b0806df-20221219 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 730639053; Mon, 19 Dec 2022 10:40:33 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 19 Dec 2022 10:40:31 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 19 Dec 2022 10:40:30 +0800 From: Xiangsheng Hou To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Mark Brown , Chuanhong Guo CC: Xiangsheng Hou , , , , , , , , Subject: [PATCH v5 00/10] Add MediaTek MT7986 SPI NAND and ECC support Date: Mon, 19 Dec 2022 10:40:09 +0800 Message-ID: <20221219024019.31974-1-xiangsheng.hou@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch series add MediaTek MT7986 SPI NAND and ECC controller support, split ECC engine with rawnand controller in bindings and change to YAML schema. Changes since V4: - Split arm and arm64 dts patch for fix existing NAND controller node name. Changes since V3: - Correct mediatek,mtk-nfc.yaml dt-bindings. Changes since V2: - Change ECC err_mask value with GENMASK macro. - Change snfi mediatek,rx-latch-latency to mediatek,rx-latch-latency-ns. - Add a separate patch for DTS change. - Move common description to top-level pattern properties. - Drop redundant parts in dt-bindings. Changes since V1: - Use existing sample delay property. - Add restricting for optional nfi_hclk. - Improve and perfect dt-bindings documentation. - Change existing node name to match NAND controller DT bingings. - Fix issues reported by dt_binding_check. - Fix issues reported by dtbs_check. Xiangsheng Hou (10): spi: mtk-snfi: Change default page format to setup default setting spi: mtk-snfi: Add optional nfi_hclk which is needed for MT7986 mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC dt-bindings: spi: mtk-snfi: Add compatible for MT7986 spi: mtk-snfi: Add snfi sample delay and read latency adjustment dt-bindings: spi: mtk-snfi: Add read latch latency property dt-bindings: mtd: Split ECC engine with rawnand controller arm64: dts: mediatek: Fix existing NAND controller node name arm: dts: mediatek: Fix existing NAND controller node name dt-bindings: mtd: mediatek,nand-ecc-engine: Add compatible for MT7986 .../bindings/mtd/mediatek,mtk-nfc.yaml | 155 +++++++++++++++ .../mtd/mediatek,nand-ecc-engine.yaml | 63 +++++++ .../devicetree/bindings/mtd/mtk-nand.txt | 176 ------------------ .../bindings/spi/mediatek,spi-mtk-snfi.yaml | 54 +++++- arch/arm/boot/dts/mt2701.dtsi | 2 +- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 2 +- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +- drivers/mtd/nand/ecc-mtk.c | 28 ++- drivers/spi/spi-mtk-snfi.c | 41 +++- 9 files changed, 330 insertions(+), 193 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml delete mode 100644 Documentation/devicetree/bindings/mtd/mtk-nand.txt