| Message ID | 20221212180732.79167-1-sudip.mukherjee@sifive.com |
|---|---|
| Headers | show |
| Series | Add support for enhanced SPI for Designware SPI controllers | expand |
Hi Sudip On Mon, Dec 12, 2022 at 06:07:17PM +0000, Sudip Mukherjee wrote: > The is v2 of the patch series adding enhanced SPI support. Some Synopsys SSI > controllers support enhanced SPI which includes Dual mode, Quad mode and > Octal mode. DWC_ssi includes clock stretching feature in enhanced SPI modes > which can be used to prevent FIFO underflow and overflow conditions while > transmitting or receiving the data respectively. > > This is almost a complete rework based on the review from Serge. Thank you very much for the series. I'll have a look at it on the next week. -Serge(y) > > > -- > Regards > Sudip > > Sudip Mukherjee (15): > spi: dw: Introduce spi_frf and STD_SPI > spi: dw: update NDF while using enhanced spi mode > spi: dw: update SPI_CTRLR0 register > spi: dw: add check for support of enhanced spi > spi: dw: Introduce enhanced mem_op > spi: dw: Introduce dual/quad/octal spi > spi: dw: send cmd and addr to start the spi transfer > spi: dw: update irq setup to use multiple handler > spi: dw: use irq handler for enhanced spi > spi: dw: Calculate Receive FIFO Threshold Level > spi: dw: adjust size of mem_op > spi: dw: Add retry for enhanced spi mode > spi: dw: detect enhanced spi mode > spi: dt-bindings: snps,dw-ahb-ssi: Add generic dw-ahb-ssi version > spi: dw: initialize dwc-ssi controller > > .../bindings/spi/snps,dw-apb-ssi.yaml | 1 + > drivers/spi/spi-dw-core.c | 347 +++++++++++++++++- > drivers/spi/spi-dw-mmio.c | 1 + > drivers/spi/spi-dw.h | 27 ++ > 4 files changed, 364 insertions(+), 12 deletions(-) > > -- > 2.30.2 >
Hi Sudip On Sun, Dec 18, 2022 at 08:45:26PM +0300, Serge Semin wrote: > Hi Sudip > > On Mon, Dec 12, 2022 at 06:07:17PM +0000, Sudip Mukherjee wrote: > > The is v2 of the patch series adding enhanced SPI support. Some Synopsys SSI > > controllers support enhanced SPI which includes Dual mode, Quad mode and > > Octal mode. DWC_ssi includes clock stretching feature in enhanced SPI modes > > which can be used to prevent FIFO underflow and overflow conditions while > > transmitting or receiving the data respectively. > > > > This is almost a complete rework based on the review from Serge. > > Thank you very much for the series. I'll have a look at it on the next > week. Just so you know. I haven't forgot about the series. There are some problematic parts which I need to give more thinking than I originally expected. I'll submit my comments very soon. Sorry for the delay. Good news is that I've got the HW-manual for the DW SSI v1.01a IP-core. So I'll no longer need to ask of you about that device implementation specifics. -Serge(y) > > -Serge(y) > > > > > > > -- > > Regards > > Sudip > > > > Sudip Mukherjee (15): > > spi: dw: Introduce spi_frf and STD_SPI > > spi: dw: update NDF while using enhanced spi mode > > spi: dw: update SPI_CTRLR0 register > > spi: dw: add check for support of enhanced spi > > spi: dw: Introduce enhanced mem_op > > spi: dw: Introduce dual/quad/octal spi > > spi: dw: send cmd and addr to start the spi transfer > > spi: dw: update irq setup to use multiple handler > > spi: dw: use irq handler for enhanced spi > > spi: dw: Calculate Receive FIFO Threshold Level > > spi: dw: adjust size of mem_op > > spi: dw: Add retry for enhanced spi mode > > spi: dw: detect enhanced spi mode > > spi: dt-bindings: snps,dw-ahb-ssi: Add generic dw-ahb-ssi version > > spi: dw: initialize dwc-ssi controller > > > > .../bindings/spi/snps,dw-apb-ssi.yaml | 1 + > > drivers/spi/spi-dw-core.c | 347 +++++++++++++++++- > > drivers/spi/spi-dw-mmio.c | 1 + > > drivers/spi/spi-dw.h | 27 ++ > > 4 files changed, 364 insertions(+), 12 deletions(-) > > > > -- > > 2.30.2 > >
On Thu, Jan 19, 2023 at 04:26:58PM +0000, Sudip Mukherjee wrote: > On Mon, Jan 9, 2023 at 4:25 PM Serge Semin <fancer.lancer@gmail.com> wrote: > > > > Hello Sudip > > > > On Thu, Jan 05, 2023 at 01:20:39AM +0300, Serge Semin wrote: > > > Hi Sudip > > > > > > On Sun, Dec 18, 2022 at 08:45:26PM +0300, Serge Semin wrote: > > > > Hi Sudip > > > > > > > > On Mon, Dec 12, 2022 at 06:07:17PM +0000, Sudip Mukherjee wrote: > > > > > The is v2 of the patch series adding enhanced SPI support. Some Synopsys SSI > > > > > controllers support enhanced SPI which includes Dual mode, Quad mode and > > > > > Octal mode. DWC_ssi includes clock stretching feature in enhanced SPI modes > > > > > which can be used to prevent FIFO underflow and overflow conditions while > > > > > transmitting or receiving the data respectively. > > > > > > > > > > This is almost a complete rework based on the review from Serge. > > > > > > > > Thank you very much for the series. I'll have a look at it on the next > > > > week. > > > > > > Just so you know. I haven't forgot about the series. There are some > > > problematic parts which I need to give more thinking than I originally > > > expected. I'll submit my comments very soon. Sorry for the delay. > > > > > > Good news is that I've got the HW-manual for the DW SSI v1.01a > > > IP-core. So I'll no longer need to ask of you about that device > > > implementation specifics. > > > > Finally I managed to consolidate my thoughts regarding your patchset. > > Here is the summary. Some specific comments will be sent in-reply to > > the corresponding patches. > > > > First of all there is a crucial difference between eSPI capability > > available on DW APB SSI and DW AHB SSI controllers: > > DW APB SSI 4.x: > > + Tx until FIFO is empty > > + No clock stretching at all > > Thanks for your detailed review and all the additional details about > DW APB SSI. I did not have this datasheet to check. > So, that will mean I can remove the APB versiom detection from my next series. > But unfortunately, I don't have access to the hardware currently to > prepare and test the v3 series. It will be delayed a bit and I am > hoping I will be able to work on this by early March. Ok. Thanks for the update. Whenever you're ready I'll be here for review. -Serge(y) > > > -- > Regards > Sudip