From patchwork Tue Dec 6 12:56:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 631411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B937C4708C for ; Tue, 6 Dec 2022 12:56:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234673AbiLFM4u (ORCPT ); Tue, 6 Dec 2022 07:56:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234728AbiLFM4r (ORCPT ); Tue, 6 Dec 2022 07:56:47 -0500 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA17618385 for ; Tue, 6 Dec 2022 04:56:41 -0800 (PST) Received: by mail-ed1-x534.google.com with SMTP id d20so20197407edn.0 for ; Tue, 06 Dec 2022 04:56:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=BtG9dpRPPLVWEzqK98/sWy4KaJxGP67G9m64q51PucI=; b=aUp8k0BBIW4Siz7zDjeP3/m+HIa1vK+Fo4f43DGP6y08STvr6VnrVZ9ZbW/tClbrRt tNYsOtEO+AeDEoO5PdelTdTbPjhiVyXFL2ityh9QPfheVAIy2+3Nt2WBSRHXMNcIa0Gp cxK3dA0QPzYoOk2am9dXHDsFBjcOJimCu2XD6x3Y9tQxH1zewyd3zc00R5EYc71vXdg8 sHMqKzbmJOvvNtYngywHI4215gCgSO9IjfZmsRXCJ3SXXvRBsLQKYvEYlCGSOTy3IP9M Fj4OkeG+0SLA2gV9rxeYh4Y8jSZ/mCswIlxpdlIidQV3s9S42Fj6XcAcRZoKaYHc0Ttd +NfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=BtG9dpRPPLVWEzqK98/sWy4KaJxGP67G9m64q51PucI=; b=LZS0fsnWcOJYEChsA4G7UWHXbkcDXkWac2PRVMODp0drXxnyn9ZRKP/cXEKrHv1MWb CK2Jfn4YUY6hmu/m1L01b488X57twkG5lOkPVznlK9FwSDLL4aUdIXk6lvCCpVdF3hfh 0T6jcx1dhZAWTOXnvuz8sLeAKdaL9XnZEoWGp9h+LcfJA+UYaLYrjQgHy86sTJESkxWE oc3bjFOJJx9f68jIHn39kjFv+fBcuc7OVC5R373kerZMHyY4tT0BC2QJVu1HBmthEBav 7cwFSj13kfJWWFBaPFG1p3TmJXyXxznLeRQGOod5Lbduo3RbyrpMMgRtLpcB2DJCWGeg ySnw== X-Gm-Message-State: ANoB5pl4dLVp1xecpeZkcchyjAnpskiXttNRSBcE1EXrZFc48jFO2DMf nFykRzxK+0WCVeo6DgdqiYtjcQ== X-Google-Smtp-Source: AA0mqf5amD0/7EuYbW/R1Yi6jZ0jxw6ms60d+vDHm21+7pR85K3W4aL/sZup3DSK0CgbKCSFu4etww== X-Received: by 2002:a05:6402:b8e:b0:46a:f256:491b with SMTP id cf14-20020a0564020b8e00b0046af256491bmr37584672edb.161.1670331400207; Tue, 06 Dec 2022 04:56:40 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id v15-20020aa7cd4f000000b0046150ee13besm932991edw.65.2022.12.06.04.56.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Dec 2022 04:56:39 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mike Turquette , Stephen Boyd , Dmitry Baryshkov , Rob Herring , Krzysztof Kozlowski Cc: Linux Kernel Mailing List , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v5 0/5] clk: qcom: Add support for SM8550 Date: Tue, 6 Dec 2022 14:56:30 +0200 Message-Id: <20221206125635.952114-1-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patchset adds more clocks support for the Qualcomm SM8550 SoC, It adds the TCSR clock controller driver and the rpmh clocks. Changes since v4: * dropped the patches 1, 3, 4 and 5 since they are already applied. * replaced DEFINE_CLK_RPMH_FIXED with DEFINE_CLK_FIXED_FACTOR in clk-rpmh.c * changed TCSR clock controller driver compatible string to qcom,sm8550-tcsr * renamed the TCSR bindings header and schema files to match qcom,sm8550-tcsr To: Andy Gross To: Bjorn Andersson To: Konrad Dybcio To: Michael Turquette To: Stephen Boyd To: Rob Herring To: Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Abel Vesa (5): dt-bindings: clock: Add SM8550 TCSR CC clocks dt-bindings: clock: Add RPMHCC for SM8550 dt-bindings: clock: qcom,rpmh: Add CXO PAD clock IDs clk: qcom: rpmh: Add support for SM8550 rpmh clocks clk: qcom: Add TCSR clock driver for SM8550 .../bindings/clock/qcom,rpmhcc.yaml | 1 + .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++ drivers/clk/qcom/Kconfig | 7 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 110 ++++++++-- drivers/clk/qcom/tcsrcc-sm8550.c | 192 ++++++++++++++++++ include/dt-bindings/clock/qcom,rpmh.h | 2 + include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 ++ 8 files changed, 364 insertions(+), 20 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml create mode 100644 drivers/clk/qcom/tcsrcc-sm8550.c create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h