From patchwork Thu Nov 10 18:31:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 623430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51FDBC43219 for ; Thu, 10 Nov 2022 18:32:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231810AbiKJScE (ORCPT ); Thu, 10 Nov 2022 13:32:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231946AbiKJScD (ORCPT ); Thu, 10 Nov 2022 13:32:03 -0500 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9321B4B980 for ; Thu, 10 Nov 2022 10:32:01 -0800 (PST) Received: by mail-lf1-x12a.google.com with SMTP id j4so4920203lfk.0 for ; Thu, 10 Nov 2022 10:32:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=P0w6ifh3W55ssxBCHDKhFfL8ApImlsR3PhJUV68KXmQ=; b=dqAY6ELHLoYHk8ekMGk/H+RnE1jsvtfHgWAXBq8WzJ2i7SvezqO5FoWS0uUgq+Q1fS 8TMO7nXrk0QoT18p4SeDD3nxHXHd0YSSxg5Oh7OX3vVVtAzQhFQNg8iBBP5Cf7xNkISi zn6IzlS2WugybziDt7Kab0eIHA+XZr0oQ3HcZrZBcz+PF1S2pB1OZWsjjArnzox7Fr0h N2hQu81+nTDGi/o4ej8RwoWI/OsMmHC4XG6x4p9b3MLJn4oGnxzbZ3jr7Ox/UuxPZed6 kAEWOV1lYX4e0KY11k6THC/aWlLwD/eVbdWS5AfRiZx8BstcQqLRcImAI8cxIYl8ORM5 W7tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=P0w6ifh3W55ssxBCHDKhFfL8ApImlsR3PhJUV68KXmQ=; b=KD9xJKy8X8p/LGsMELD9HjUllmQB1za8bWWGs6C1fnIqwGPpj2I78jNceekWGFXzMA OcdfRVAsGufi57INwgKxKwSp6DDcCarkVo1hUwydkkxWQomCTiQzmUa/LCLjGF8UHrcV kb0+zURncxdmeoIJUc7tFyNxCPdQJpHN1DyUf3/Ttlis2/fjpU8yRhxV+ikzh5iMai7Q p/CC9da2nd3RYfoyLyGRN17+BQWcbVmX5Jsn5MBmmffcN6YbaDi2w4fXukIyWFpRoIeZ gi54gxRf4xsn9FgQDNHdMWlzb/oEFFBXxD/LlJNBs42fmsdeETZN5C5SVh3HJxZi0R4y HLzA== X-Gm-Message-State: ACrzQf0PQ1MZlrgarI88vq04TQQLnPgzG6hpKibsOJwtCuLgJxzh/A/C fOA4+Olr/kPzSgVatoxS4uDvoOWCRfR2Xg== X-Google-Smtp-Source: AMsMyM4Np8thznuI2huzMD6NT4W7d8cCQMrCPgsi3stR6myY8i6AHx721i8He4MZOJjmA3y4Bu5viQ== X-Received: by 2002:ac2:4d4c:0:b0:4a4:6e90:c571 with SMTP id 12-20020ac24d4c000000b004a46e90c571mr1741400lfp.570.1668105119880; Thu, 10 Nov 2022 10:31:59 -0800 (PST) Received: from eriador.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id m18-20020a197112000000b004a2550db9ddsm2837087lfc.245.2022.11.10.10.31.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Nov 2022 10:31:59 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Bjorn Helgaas , Stanimir Varbanov , Manivannan Sadhasivam Cc: Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 0/8] PCI/phy: Add support for PCI on sm8350 platform Date: Thu, 10 Nov 2022 21:31:50 +0300 Message-Id: <20221110183158.856242-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SM8350 is one of the recent Qualcomm platforms which lacks PCIe support. Use sm8450 PHY tables to add support for the PCIe hosts on Qualcomm SM8350 platform. Note: the PCIe0 table is based on the lahaina-v2.1.dtsi file, so it might work incorrectly on earlier SoC revisions. Dependencies: - phy/next (for PHY patches only) Changes since v2: - Rebased onto phy/next - Added voltge supplies to the HDK dts file (Johan) Changes since v1: - removed pipe/ref clocks from the PCI schema, they are unused now - split the sm8450 tables commit into separate split & rename (Bjorn) - cleaned up the dtsi file, removing 'power-domain-names' and fixing gpio proprety names. Dmitry Baryshkov (8): dt-bindings: PCI: qcom: Add sm8350 to bindings dt-bindings: phy: qcom,qmp-pcie: add sm8350 bindings PCI: qcom: Add support for SM8350 phy: qcom-qmp-pcie: split sm8450 gen3 PHY config tables phy: qcom-qmp-pcie: rename the sm8450 gen3 PHY config tables phy: qcom-qmp-pcie: add support for sm8350 platform arm64: dts: qcom: sm8350: add PCIe devices arm64: dts: qcom: sm8350-hdk: enable PCIe devices .../devicetree/bindings/pci/qcom,pcie.yaml | 46 ++++ .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 22 ++ arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 20 ++ arch/arm64/boot/dts/qcom/sm8350.dtsi | 246 +++++++++++++++++- drivers/pci/controller/dwc/pcie-qcom.c | 1 + drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 164 ++++++++++-- 6 files changed, 481 insertions(+), 18 deletions(-)