Message ID | 20220922195651.345369-1-krzysztof.kozlowski@linaro.org |
---|---|
Headers | show |
Series | pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings | expand |
On Thu, 22 Sep 2022 21:56:44 +0200, Krzysztof Kozlowski wrote: > The LPASS pin controller follows generic pin-controller bindings, so > just like TLMM, should have subnodes with '-state' and '-pins'. > > qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a required property > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../qcom,sm8250-lpass-lpi-pinctrl.yaml | 36 +++++++++++++++++-- > 1 file changed, 34 insertions(+), 2 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Thu, 22 Sep 2022 21:56:46 +0200, Krzysztof Kozlowski wrote: > The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so > allow it. Squash also blank lines for readability. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>