From patchwork Wed Aug 17 23:00:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 597947 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB30EC25B08 for ; Wed, 17 Aug 2022 23:03:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241984AbiHQXDj (ORCPT ); Wed, 17 Aug 2022 19:03:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229572AbiHQXDi (ORCPT ); Wed, 17 Aug 2022 19:03:38 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1E48A50F6; Wed, 17 Aug 2022 16:03:36 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 93C10B81FBD; Wed, 17 Aug 2022 23:03:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1F84CC433D6; Wed, 17 Aug 2022 23:03:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660777414; bh=1MR315QnADwsilPIFFMT06JsmqGYa2wV+d693CoceVc=; h=From:To:Cc:Subject:Date:From; b=S5V4hGf981y0IeA4JPZAHR2kr6hDH38wWliHwNqfI2dfWphyATDz5Qk/MZFirD7BX nSItPRpmr/FpVPFdAwaIi17YuCagg7a6tuqcuS4Zn1brmsBRUzw4LeiaoFw8n8yVRu iwF3PW7JvO+bXDpmburJ981bqJQ0U/RirF28o6jM7QvF0xIBEY3LmgLCmbOjIR0nBp xsHlU3UvOd7QTvazuqhCxvqDlJBoKUw8nKoiJE253QeHrpu+omMAXbvLbXrmziqvXx 6jT0p3R0QQDJomvO0jCcrvdWiKk4KEUbEzziplFe03WpX/mwQVawpYj3qHuuIboPXy Pd4ZOodfM1LJw== Received: by pali.im (Postfix) id 58E9277A; Thu, 18 Aug 2022 01:03:31 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilcz?= =?utf-8?q?y=C5=84ski?= , Bjorn Helgaas , Rob Herring , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , Thomas Petazzoni Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/4] PCI: mvebu: Add support for error interrupt Date: Thu, 18 Aug 2022 01:00:32 +0200 Message-Id: <20220817230036.817-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org PCI mvebu error interrupt source is triggered for non-INTx event. So e.g. when AER or PME event occurs. This patch series adds support for reporting AER and PME interrupts on Marvell PCIe Root Ports which allows use to kernel AER and PME drivers. Without this change kernel AER and PME drivers do not work at all. DT bindings for this support is currently provided only for Kirkwood and Dove platforms as other new mvebu SoCs requires extension to armada IRQ driver, which is currently disallowed. Without new DTS files, pci-mvebu.c driver acts as before this change, there is no AER and PME kernel support. I have tested this change on Armada 385 board (with additional changes to A385 DTS files and IRQ driver, not included there) and AER interrupt is delivered to kernel AER driver correctly. Pali Rohár (4): dt-bindings: PCI: mvebu: Update information about error interrupt PCI: mvebu: Implement support for interrupts on emulated bridge ARM: dts: kirkwood: Add definitions for PCIe error interrupts ARM: dts: dove: Add definitions for PCIe error interrupts .../devicetree/bindings/pci/mvebu-pci.txt | 1 + arch/arm/boot/dts/dove.dtsi | 8 +- arch/arm/boot/dts/kirkwood-6192.dtsi | 4 +- arch/arm/boot/dts/kirkwood-6281.dtsi | 4 +- arch/arm/boot/dts/kirkwood-6282.dtsi | 8 +- arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 4 +- drivers/pci/controller/pci-mvebu.c | 256 ++++++++++++++++-- 7 files changed, 252 insertions(+), 33 deletions(-)