| Message ID | 20220606110443.30362-1-s-vadapalli@ti.com |
|---|---|
| Headers | show |
| Series | J7200: CPSW5G: Add support for QSGMII mode to am65-cpsw driver | expand |
On Mon, Jun 06, 2022 at 04:34:41PM +0530, Siddharth Vadapalli wrote: > Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external > ports) CPSW5G module and add compatible for it. > > Changes made: > - Add new compatible ti,j7200-cpswxg-nuss for CPSW5G. > - Extend pattern properties for new compatible. > - Change maximum number of CPSW ports to 4 for new compatible. > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> > --- > .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 135 ++++++++++++------ > 1 file changed, 93 insertions(+), 42 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml > index b8281d8be940..49f63aaf5a08 100644 > --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml > +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml > @@ -57,6 +57,7 @@ properties: > - ti,am654-cpsw-nuss > - ti,j721e-cpsw-nuss > - ti,am642-cpsw-nuss > + - ti,j7200-cpswxg-nuss > > reg: > maxItems: 1 > @@ -108,48 +109,98 @@ properties: > const: 1 > '#size-cells': > const: 0 > - > - patternProperties: > - port@[1-2]: Just change this to 'port@[1-4]'. > - type: object > - description: CPSWxG NUSS external ports > - > - $ref: ethernet-controller.yaml# > - > - properties: > - reg: > - minimum: 1 > - maximum: 2 And this to 4. Then, you just need this to disallow the additional ports: if: not: properties: compatible: contains: const: ti,j7200-cpswxg-nuss then: patternProperties: '^port@[3-4]$': false Rob
Add support for QSGMII mode to am65-cpsw driver. Change log: v2 -> v3: 1. In ti,k3-am654-cpsw-nuss.yaml, restrict if/then statement to port nodes. v1 -> v2: 1. Add new compatible for CPSW5G in ti,k3-am654-cpsw-nuss.yaml and extend properties for new compatible. 2. Add extra_modes member to struct am65_cpsw_pdata to be used for QSGMII mode by new compatible. 3. Add check for phylink supported modes to ensure that only one phy mode is advertised as supported. 4. Check if extra_modes supports QSGMII mode in am65_cpsw_nuss_mac_config() for register write. 5. Add check for assigning port->sgmii_base only when extra_modes is valid. v2: https://lore.kernel.org/r/20220602114558.6204-1-s-vadapalli@ti.com/ v1: https://lore.kernel.org/r/20220531113058.23708-1-s-vadapalli@ti.com Siddharth Vadapalli (3): dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G net: ethernet: ti: am65-cpsw: Add support for J7200 CPSW5G net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct location .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 135 ++++++++++++------ drivers/net/ethernet/ti/am65-cpsw-nuss.c | 41 +++++- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 2 + 3 files changed, 129 insertions(+), 49 deletions(-)