From patchwork Mon Aug 30 23:01:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artur Rojek X-Patchwork-Id: 504406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93384C432BE for ; Mon, 30 Aug 2021 23:02:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E0D96101B for ; Mon, 30 Aug 2021 23:02:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235435AbhH3XDU (ORCPT ); Mon, 30 Aug 2021 19:03:20 -0400 Received: from relay12.mail.gandi.net ([217.70.178.232]:39659 "EHLO relay12.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238476AbhH3XDU (ORCPT ); Mon, 30 Aug 2021 19:03:20 -0400 Received: (Authenticated sender: contact@artur-rojek.eu) by relay12.mail.gandi.net (Postfix) with ESMTPSA id E07A0200002; Mon, 30 Aug 2021 23:02:21 +0000 (UTC) From: Artur Rojek To: Mark Brown , Rob Herring , Paul Cercueil , Thomas Bogendoerfer , Pavel Nadein Cc: Pavel Nadein , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Artur Rojek Subject: [5.16][PATCH 0/3] Support for Ingenic JZ47xx SPI controller Date: Tue, 31 Aug 2021 01:01:36 +0200 Message-Id: <20210830230139.21476-1-contact@artur-rojek.eu> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, This patchset introduces support for SPI controllers found in the Ingenic JZ47xx family of SoCs. Of particular note, this allows to replace GPIO backed SPI on the MIPS Creator CI20 board. Mark: Checkpatch generates a `need consistent spacing around '*'` error on this patchset, however I believe this is a false positive due to it confusing a pointer with multiplication operator inside a macro. Rob: I refrained from adding SPI pin groups into the bindings, as I felt that would be enforcing a policy (SPI signals can be multiplexed on multiple pin groups on the board, per use case). Instead, I included an example pin configuration into the relevant commit description. Other controllers already present in ci20.dts do specify their pin groups, but I think this is bad practice. Do you have particular guidelines on this? Pavel: Feel free to add your Tested-by, if you still have your CI20 setup around :) I tested this driver with two SPI mode MMC/SD card readers and also with the spi-loopback test driver. Cheers, Artur Artur Rojek (2): SPI: add Ingenic JZ47xx driver. MIPS: JZ4780: CI20: DTS: add SPI controller config Paul Cercueil (1): dt-bindings: spi: Document Ingenic SPI controller bindings .../devicetree/bindings/spi/ingenic,spi.yaml | 72 +++ arch/mips/boot/dts/ingenic/ci20.dts | 9 +- arch/mips/boot/dts/ingenic/jz4780.dtsi | 44 +- drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/spi-ingenic.c | 482 ++++++++++++++++++ 6 files changed, 602 insertions(+), 15 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/ingenic,spi.yaml create mode 100644 drivers/spi/spi-ingenic.c Signed-off-by: Artur Rojek