From patchwork Fri Aug 20 19:03:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 501118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2189EC432BE for ; Fri, 20 Aug 2021 19:04:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 038BC61057 for ; Fri, 20 Aug 2021 19:04:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237277AbhHTTEr (ORCPT ); Fri, 20 Aug 2021 15:04:47 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:42446 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234249AbhHTTEq (ORCPT ); Fri, 20 Aug 2021 15:04:46 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 17KJ3p9I081608; Fri, 20 Aug 2021 14:03:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1629486231; bh=quRiQhXdk6WCGDxPbnZkmnARtCTeN8OCt02MgE+FDH4=; h=From:To:CC:Subject:Date; b=nTMIU5pEKssi9MXATtK5n9c5nJ5VktdOdQA6xRpuZN7i818X8kIRb7BCr/Lg/j2W0 I/mH2TSZgmuUZgEvAmH81xODVUcQKFimBlgzaVGdHTLOpLzeaWgjqKhkOdnvO1hfwj j9lrPvWDC0hV2HNM5MVVUAgByIfC7KW0vIKvaVP4= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 17KJ3pDM022046 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 20 Aug 2021 14:03:51 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 20 Aug 2021 14:03:51 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Fri, 20 Aug 2021 14:03:51 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 17KJ3lwW018479; Fri, 20 Aug 2021 14:03:47 -0500 From: Pratyush Yadav To: Vinod Koul CC: Paul Kocialkowski , Tomi Valkeinen , Vignesh Raghavendra , Nikhil Devshatwar , Laurent Pinchart , Chunfeng Yun , Kishon Vijay Abraham I , Peter Chen , Pratyush Yadav , Rob Herring , , , Subject: [PATCH v4 0/6] Rx mode support for Cadence DPHY Date: Sat, 21 Aug 2021 00:33:40 +0530 Message-ID: <20210820190346.18550-1-p.yadav@ti.com> X-Mailer: git-send-email 2.30.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, This series adds support for Rx mode on Cadence DPHY driver. It has been split off from [0] to facilitate easier merging. I have still kept the version number to maintain continuity with the previous patches. This series also includes conversion to YAML binding. Tested on TI's J721E with OV5640 sensor. [0] https://patchwork.linuxtv.org/project/linux-media/list/?series=5526&state=%2A&archive=both Changes in v4: - Instead of having both Rx and Tx modes in the same driver data, keep them separate since the op selection is based on compatible now. For that reason, the cdns_dphy_driver_data struct is no longer needed. - Rename ref_dphy_ops to tx_ref_dphy_ops to clarify their purpose. - Drop submode checks in validate() hook. - Drop the submode parts. Use a different compatible for the Rx ops. - Make bands and num_bands static. Changes in v3: - Use a table to select the band. - Use a table to poll the data lane ready bits. - Multiply the DPHY HS clock rate by 2 to get the bit rate since the clock is DDR. - Add Rob's R-by. Changes in v2: - Drop reg description. - Add a description for each DPHY clock. - Rename dphy@... to phy@... in example. - Add Laurent's R-by. - Re-order subject prefixes. - Re-order subject prefixes. - Add power-domain to the example. - Add Laurent's R-by. - Re-order subject prefixes. Pratyush Yadav (6): phy: cdns-dphy: Prepare for Rx support phy: cdns-dphy: Add Rx support phy: dt-bindings: Convert Cadence DPHY binding to YAML phy: dt-bindings: cdns,dphy: make clocks optional phy: dt-bindings: cdns,dphy: add power-domains property phy: dt-bindings: cdns,dphy: add Rx DPHY compatible .../devicetree/bindings/phy/cdns,dphy.txt | 20 -- .../devicetree/bindings/phy/cdns,dphy.yaml | 55 ++++ drivers/phy/cadence/cdns-dphy.c | 294 +++++++++++++++--- 3 files changed, 313 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/cdns,dphy.txt create mode 100644 Documentation/devicetree/bindings/phy/cdns,dphy.yaml --- 2.30.0