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[0/6] drm/panel: atna33xc20: Fix the Samsung ATNA33XC20 panel

Message ID 20210728164557.1882787-1-dianders@chromium.org
Headers show
Series drm/panel: atna33xc20: Fix the Samsung ATNA33XC20 panel | expand

Message

Doug Anderson July 28, 2021, 4:45 p.m. UTC
The overall goal of this series is to make the Samsung ATNA33XC20
panel work more properly. As part of this, we have:
* A bugfix for the recently abstracted DP AUX backlight code.
* A bugfix for the sequencing of the ti-sn65dsi86 bridge driver.
* Removal of the panel from panel-simple and moving it to its own
  driver.

If the bugfixes look good but the rest of the series needs work then
those could land early on their own. There's no real compile time
dependency on the bugfixes, things are just glitchier without them.

NOTE: this series will (slightly) conflict with my other recent series
making eDP panels probable [1]. The conflict is easy to resolve and
I'm happy to repost either once the other lands. It should be noted
that the fact that the Samsung ATNA33XC20 needs its own panel driver
means that it _can't_ handled as a probed driver. I think this is
fine, at least for now. I don't think it would be easy to make a
unified design with this panel and other panels given that it's an
AMOLED panel and has a whole bunch of different components on board.

[1] https://lore.kernel.org/r/20210723002146.1962910-1-dianders@chromium.org/


Douglas Anderson (6):
  drm/dp: Don't zero PWMGEN_BIT_COUNT when driver_pwm_freq_hz not
    specified
  drm/bridge: ti-sn65dsi86: Fix power off sequence
  drm/bridge: ti-sn65dsi86: Add some 100 us delays
  Revert "drm/panel-simple: Add Samsung ATNA33XC20"
  Revert "drm/panel-simple: Support for delays between GPIO & regulator"
  drm/panel: atna33xc20: Introduce the Samsung ATNA33XC20 panel

 drivers/gpu/drm/bridge/ti-sn65dsi86.c         |  17 +-
 drivers/gpu/drm/drm_dp_helper.c               |  10 +-
 drivers/gpu/drm/panel/Kconfig                 |  12 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-samsung-atna33xc20.c  | 366 ++++++++++++++++++
 drivers/gpu/drm/panel/panel-simple.c          |  61 ---
 6 files changed, 398 insertions(+), 69 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-samsung-atna33xc20.c

Comments

Robert Foss July 29, 2021, 11:48 a.m. UTC | #1
Hey Doug,

Thanks for submitting this.

On Wed, 28 Jul 2021 at 18:46, Douglas Anderson <dianders@chromium.org> wrote:
>
> The manual has always said that we need 100 us delays in a few
> places. Though it hasn't seemed to be a big deal to skip these, let's
> add them in case it makes something happier.
>
> NOTE: this fixes no known issues but it seems good to make it right.
>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
>
>  drivers/gpu/drm/bridge/ti-sn65dsi86.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index 5e932070a1c3..cd0fccdd8dfd 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -307,6 +307,9 @@ static int __maybe_unused ti_sn65dsi86_resume(struct device *dev)
>                 return ret;
>         }
>
> +       /* td2: min 100 us after regulators before enabling the GPIO */
> +       usleep_range(100, 110);
> +
>         gpiod_set_value(pdata->enable_gpio, 1);
>
>         /*
> @@ -1096,6 +1099,9 @@ static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
>
>         if (!pdata->refclk)
>                 ti_sn65dsi86_enable_comms(pdata);
> +
> +       /* td7: min 100 us after enable before DSI data */
> +       usleep_range(100, 110);
>  }
>
>  static void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
> --
> 2.32.0.432.gabb21c7263-goog
>

Acked-by: Robert Foss <robert.foss@linaro.org>