From patchwork Wed Jul 21 19:49:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Mahadev Lad X-Patchwork-Id: 484073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C12DC6377B for ; Wed, 21 Jul 2021 19:50:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EE0F56121F for ; Wed, 21 Jul 2021 19:50:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232240AbhGUTJ7 (ORCPT ); Wed, 21 Jul 2021 15:09:59 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:19770 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S232213AbhGUTJ7 (ORCPT ); Wed, 21 Jul 2021 15:09:59 -0400 X-IronPort-AV: E=Sophos;i="5.84,258,1620658800"; d="scan'208";a="88350317" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 22 Jul 2021 04:50:33 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 827C3400D0FD; Thu, 22 Jul 2021 04:50:30 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Rob Herring , Fabrizio Castro , Wolfgang Grandegger , Marc Kleine-Budde , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-can@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH v3 0/3] Renesas RZ/G2L CANFD support Date: Wed, 21 Jul 2021 20:49:48 +0100 Message-Id: <20210721194951.30983-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi All, This patch series adds CANFD support to Renesas RZ/G2L family. CANFD block on RZ/G2L SoC is almost identical to one found on R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel are split into individual sources. Cheers, Prabhakar Changes for v3: * Dropped core clock addition patches from this series (its queued up already in renesas-clk-for-v5.15) * Added reset-names in binding doc as suggested by Philipp * Updated interrupt names in binding doc as suggested by Geert * Updated the driver to handle the above DT binding changes Changes for v2: * Added interrupt-names property and marked it as required for RZ/G2L family * Added descriptions for reset property * Re-used irq handlers on RZ/G2L SoC * Added new enum for chip_id * Dropped R9A07G044_LAST_CORE_CLK * Dropped patch (clk: renesas: r9a07g044-cpg: Add clock and reset entries for CANFD) as its been merged into renesas tree Lad Prabhakar (3): dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC can: rcar_canfd: Add support for RZ/G2L family arm64: dts: renesas: r9a07g044: Add CANFD node .../bindings/net/can/renesas,rcar-canfd.yaml | 69 ++++++- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 41 +++++ drivers/net/can/rcar/rcar_canfd.c | 173 +++++++++++++++--- 3 files changed, 253 insertions(+), 30 deletions(-)