From patchwork Thu Jun 24 07:25:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 466335 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp202798jao; Thu, 24 Jun 2021 00:25:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJymVv5qhSr/A8sUakuVoFpN5EZMyutznjNsVfBIOyUyMAh4pRWJaK66ym8sZeXbpsxwUm43 X-Received: by 2002:a17:906:670c:: with SMTP id a12mr3806692ejp.249.1624519555583; Thu, 24 Jun 2021 00:25:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624519555; cv=none; d=google.com; s=arc-20160816; b=mJjE0NCDXYUPiyzAXj5aisepuqsSl8fwTanYnP0+ucxhV//NCi8A2CFb69I6+/RKgO NiSVc9gQOVgG19mpX4ScFHvsxRCjPwPFwRtRvoinlxFIh4GpGKo4oHTuMLARAKzY1nvF L5+dU2oEFBNa76eKnNbLIG9NXZdJWwJ8y5AnFlxZ5dInonkWJfdWgFKjpFecwzKG3+u1 zV9te20CFWW04Iizxx81mx0VkW/1CnZLEKWaOzEK14g5HYeKfOH7HfgTJF2H8jVZE893 bhkXa13K/wpWDfQS90xok/wf2hisUXPV39vBYdZM8xf06rD2LGnNhQSDfnxdDIPETjkG Ja2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=T7hKBbNfZnUEFRVyGSb3NXeHE5g+9KB0412sx5zKsWc=; b=MLnnEvUNFSykglA0+zZ8hUk0oprHKR2FEeTLJCl+9KaOMKSTQhZILGycPJ6XkEtEcX dYBp8IUrrVCTL4ORUTTZoCfZzptGe2fKV8WUA0ReCBmCeT+Z0a41q7n7C/1Dw3FbAw5S fXtoZf/zliWCrALsPCodYLPZIhSlCKVEBPhzAhAzEfZuDp/4d50r2viXZGWSYw6JWM9s 1m98k06p/Gt0/JtIibfTPGS+T26nao4HjdI5B7Duw3UiWTo1UOjxKiKb++zwpmMaec1E oUIIZwjpDXOfgR+2sDZCjhaNeOGsFQTMKN11cK2QuraetLo5FacSXHzWHN+dg2FPPsL+ YmvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WmhHUBR9; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h24si2725353ejt.474.2021.06.24.00.25.55; Thu, 24 Jun 2021 00:25:55 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WmhHUBR9; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231437AbhFXH2J (ORCPT + 7 others); Thu, 24 Jun 2021 03:28:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230402AbhFXH2J (ORCPT ); Thu, 24 Jun 2021 03:28:09 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57C93C061760 for ; Thu, 24 Jun 2021 00:25:50 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id g192so4424445pfb.6 for ; Thu, 24 Jun 2021 00:25:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=T7hKBbNfZnUEFRVyGSb3NXeHE5g+9KB0412sx5zKsWc=; b=WmhHUBR9MFvp62nyWky5sL7YdhwHI4HK6/dsMwN3s+hGgUn0qByVEuoa7GyUu4xh0E p1SOmN08+ilFp4CdAYq4oHsWsDDlgst3Vvi4f8N48iTjUKNH44SxljmeDSSRNnvqKlDb vL6RlzefR/fUz/p9movHNNxfkC8xmeQcrrepgWrK8XdlUyJDcwIERMaovpEWV0U+2dMI 5sulrsdMaUM8cbGCtRRqrRPrv3OaVXRcKZwgaFdOhL3+rN4h12KkY26le74F+OCPYMIy M+aKHfEbFyDYq1Uv4JC+CxlgSZo5C8i+AAU6sMRMLZm6MlXtdk1S8i6E5uN/bFQC7gvs smhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=T7hKBbNfZnUEFRVyGSb3NXeHE5g+9KB0412sx5zKsWc=; b=rabghiIV0Vrb5mJXusu2LLQWg+hM2l+RdOA1F28DGXJBYcRwn7uMvpzwfaud93h91m TIoZVnVwYReYc77gZ6rhvAvSLjD7DcILZ9EebJ/17MQGXJvqDgPXZFr5RdVorErEYVoM utLgJSy6afr1LozCOgUMsBCLObQdEK8vR2hSgznkzZG8hGCe8AtEPVYU7ULv8Vi0mIjR mR9CiGVIKjJ+k5n1raUn0Skx89pJuv2lDQEbN+eFmjIoSeDxhGsA/iYarD1Ji3k9tdRN Wi9sbgr+++ccPV7waFH/jK7eXVyt25x6+e6XUYvMxLBIs7R2rTSLc49p5bbBfmvZ3suV IpEQ== X-Gm-Message-State: AOAM533Aqz8HnAjSV7l7y1CyHCewwAXnrAXT3BYz1YJiBmDQZdzBBQNo 9CH4vIDIL00Z9mxfSAEKFPLV X-Received: by 2002:a63:e948:: with SMTP id q8mr3627859pgj.52.1624519549630; Thu, 24 Jun 2021 00:25:49 -0700 (PDT) Received: from localhost.localdomain ([120.138.12.173]) by smtp.gmail.com with ESMTPSA id g13sm1923802pfv.65.2021.06.24.00.25.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Jun 2021 00:25:49 -0700 (PDT) From: Manivannan Sadhasivam To: kishon@ti.com, lorenzo.pieralisi@arm.com, bhelgaas@google.com, robh@kernel.org Cc: devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, smohanad@codeaurora.org, bjorn.andersson@linaro.org, sallenki@codeaurora.org, skananth@codeaurora.org, vpernami@codeaurora.org, vbadigan@codeaurora.org, Manivannan Sadhasivam Subject: [PATCH v4 0/3] Add Qualcomm PCIe Endpoint driver support Date: Thu, 24 Jun 2021 12:55:31 +0530 Message-Id: <20210624072534.21191-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This series adds support for Qualcomm PCIe Endpoint controller found in platforms like SDX55. The Endpoint controller is based on the designware core with additional Qualcomm wrappers around the core. The driver is added separately unlike other Designware based drivers that combine RC and EP in a single driver. This is done to avoid complexity and to maintain this driver autonomously. The driver has been validated with an out of tree MHI function driver on SDX55 based Telit FN980 EVB connected to x86 host machine over PCIe. Thanks, Mani Changes in v4: * Removed the active_config settings needed for IPA integration * Switched to writel for couple of relaxed versions that sneaked in Changes in v3: * Lot of minor cleanups to the driver patch based on review from Bjorn and Stan. * Noticeable changes are: - Got rid of _relaxed calls and used readl/writel - Got rid of separate TCSR memory region and used syscon for getting the register offsets for Perst registers - Changed the wake gpio handling logic - Added remove() callback and removed "suppress_bind_attrs" - stop_link() callback now just disables PERST IRQ * Added MMIO region and doorbell interrupt to the binding * Added logic to write MMIO physicall address to MHI base address as it is for the function driver to work Changes in v2: * Addressed the comments from Rob on bindings patch * Modified the driver as per binding change * Fixed the warnings reported by Kbuild bot * Removed the PERST# "enable_irq" call from probe() Manivannan Sadhasivam (3): dt-bindings: pci: Add devicetree binding for Qualcomm PCIe EP controller PCI: dwc: Add Qualcomm PCIe Endpoint controller driver MAINTAINERS: Add entry for Qualcomm PCIe Endpoint driver and binding .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 160 ++++ MAINTAINERS | 10 +- drivers/pci/controller/dwc/Kconfig | 10 + drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-qcom-ep.c | 751 ++++++++++++++++++ 5 files changed, 931 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml create mode 100644 drivers/pci/controller/dwc/pcie-qcom-ep.c -- 2.25.1