From patchwork Fri Jun 4 18:09:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Mahadev Lad X-Patchwork-Id: 454256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E1C6C4743C for ; Fri, 4 Jun 2021 18:09:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0152F613FA for ; Fri, 4 Jun 2021 18:09:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229864AbhFDSL1 (ORCPT ); Fri, 4 Jun 2021 14:11:27 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:12884 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S229726AbhFDSL1 (ORCPT ); Fri, 4 Jun 2021 14:11:27 -0400 X-IronPort-AV: E=Sophos;i="5.83,248,1616425200"; d="scan'208";a="83439026" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Jun 2021 03:09:39 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id E24F540C7B95; Sat, 5 Jun 2021 03:09:37 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH 0/3] SoC identification support for RZ/G2L Date: Fri, 4 Jun 2021 19:09:30 +0100 Message-Id: <20210604180933.16754-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi All, This patch series adds support for RZ/G2{L,LC} SoC identification. SoC identification register is part of SYSC block and currently no driver is added for SYSC block so just the basic properties are added in binding documentation (and will updated with the required properties once the dirver is in place) and this node is used in renesas-soc.c for SoC identification. This patches series is dependent on [1]. [1] https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=493701 Cheers, Prabhakar Lad Prabhakar (3): dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's arm64: dts: renesas: r9a07g044: Add SYSC node to RZ/G2L SoC DTSI .../bindings/power/renesas,rzg2l-sysc.yaml | 50 +++++++++++++++++++ arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 10 ++++ drivers/soc/renesas/renesas-soc.c | 34 ++++++++++++- 3 files changed, 93 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml