From patchwork Tue Jun 1 02:44:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Smlhbmp1biBXYW5nICjnjovlu7rlhpsp?= X-Patchwork-Id: 451556 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02BCBC47080 for ; Tue, 1 Jun 2021 02:44:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BEC4A6135D for ; Tue, 1 Jun 2021 02:44:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232503AbhFACp5 (ORCPT ); Mon, 31 May 2021 22:45:57 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:56265 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232268AbhFACp5 (ORCPT ); Mon, 31 May 2021 22:45:57 -0400 X-UUID: bff2d02a406e44839be910fce4ad9fe3-20210601 X-UUID: bff2d02a406e44839be910fce4ad9fe3-20210601 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 621564343; Tue, 01 Jun 2021 10:44:14 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 1 Jun 2021 10:44:11 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 1 Jun 2021 10:44:10 +0800 From: Jianjun Wang To: Ryder Lee , Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi CC: Matthias Brugger , , , , , , Jianjun Wang , Randy Wu , Subject: [PATCH 0/2] PCI: mediatek-gen3: Add controller support for MT8195 Date: Tue, 1 Jun 2021 10:44:06 +0800 Message-ID: <20210601024408.24485-1-jianjun.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These series patches modify pcie-mediatek-gen3.c and dt-bindings compatible string to support the PCIe controller for MT8195. Jianjun Wang (2): dt-bindings: PCI: mediatek-gen3: Add support for MT8195 PCI: mediatek-gen3: Add controller support for MT8195 Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 +++- drivers/pci/controller/pcie-mediatek-gen3.c | 1 + 2 files changed, 4 insertions(+), 1 deletion(-)