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[84.226.106.126]) by smtp.gmail.com with ESMTPSA id e6sm10497145ejd.31.2021.05.26.09.21.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 May 2021 09:21:33 -0700 (PDT) From: Jean-Philippe Brucker To: joro@8bytes.org, will@kernel.org Cc: robh+dt@kernel.org, lorenzo.pieralisi@arm.com, guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, Jonathan.Cameron@huawei.com, eric.auger@redhat.com, zhangfei.gao@linaro.org, wangzhou1@hisilicon.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jean-Philippe Brucker Subject: [PATCH v15 0/3] iommu/arm-smmu-v3: Add stall support Date: Wed, 26 May 2021 18:19:25 +0200 Message-Id: <20210526161927.24268-1-jean-philippe@linaro.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add stall support for SMMUv3, enabling I/O page faults and SVA for compatible devices. No change since last version [1], but I'd still like this to be considered for upstream, because there exists hardware and applications. Stall is implemented by the Kunpeng 920 processor for its compression and crypto accelerators, with which I tested the SVA infrastructure. Using the userspace accelerator API [2], a program can obtain a queue from one of these devices and submit compression or encryption work within the program's address space. UADK [3] provides a library to do this, and there is an openssl plugin [4] to use it. That's probably as far as we can go in terms of real users of SVA at the moment, since userspace won't progress much further without upstream kernel support - these three patches. Stall is only enabled if the firmware declares that the device supports stalling (explicit flags from patches 1 and 2) or, in the case of the Kunpeng 920, with a quirk [5]. If that property is not set, stall will still be disabled in the STE and CD, and this series should not have any negative impact on existing systems. [1] https://lore.kernel.org/linux-iommu/20210401154718.307519-1-jean-philippe@linaro.org/ [2] Documentation/misc-devices/uacce.rst [3] https://github.com/Linaro/uadk [4] https://github.com/Linaro/openssl-uadk [5] https://lore.kernel.org/linux-pci/1615258837-12189-1-git-send-email-zhangfei.gao@linaro.org/ FWIW future devices should implement PRI: https://lore.kernel.org/linux-pci/5FD9EE6E.1040505@hisilicon.com/ Jean-Philippe Brucker (3): dt-bindings: document stall property for IOMMU masters ACPI/IORT: Enable stall support for platform devices iommu/arm-smmu-v3: Add stall support for platform devices .../devicetree/bindings/iommu/iommu.txt | 18 ++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 43 ++++ drivers/acpi/arm64/iort.c | 4 +- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 59 +++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 196 +++++++++++++++++- 5 files changed, 304 insertions(+), 16 deletions(-) -- 2.31.1