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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id 145sm5933229pfv.196.2021.05.03.22.28.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 22:28:53 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH 0/5] Add MSM8939 APCS/A53PLL clock support Date: Tue, 4 May 2021 13:28:39 +0800 Message-Id: <20210504052844.21096-1-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series adds MSM8939 APCS/A53PLL clock support. Most outstanding thing about MSM8939 is that it integrates 3 APCS instances, for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect) respectively. Note: the first one is a small improvement which is not specific to MSM8939 support. Shawn Guo (5): clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical dt-bindings: clock: update qcom,a53pll bindings for MSM8939 support clk: qcom: apcs-msm8916: Retrieve clock name from DT clk: qcom: a53-pll: Pass freq_tbl via match data clk: qcom: a53-pll: Add MSM8939 a53pll clocks .../bindings/clock/qcom,a53pll.yaml | 34 +++++++++++ drivers/clk/qcom/a53-pll.c | 59 +++++++++++++++++-- drivers/clk/qcom/apcs-msm8916.c | 7 ++- 3 files changed, 93 insertions(+), 7 deletions(-) -- 2.17.1