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[0/3] Add support for PCIe PHY in SDX55

Message ID 20210427065400.18958-1-manivannan.sadhasivam@linaro.org
Headers show
Series Add support for PCIe PHY in SDX55 | expand

Message

Manivannan Sadhasivam April 27, 2021, 6:53 a.m. UTC 
Hi,

This series adds support for PCIe PHY found in Qualcomm SDX55 platform.
The PHY version is v4.20 which has different register offsets compared with
previous v4.0x versions. So separate defines are introducted to handle the
differences.

This series has been tested on Telit FN980 EVB with an out of tree PCIe Endpoint
driver.

Thanks,
Mani

Manivannan Sadhasivam (3):
  dt-bindings: phy: qcom,qmp: Add binding for SDX55 PCIe PHY
  phy: qcom-qmp: Use phy_status field for the status bit offset
  phy: qcom-qmp: Add support for SDX55 QMP PCIe PHY

 .../devicetree/bindings/phy/qcom,qmp-phy.yaml |   2 +
 drivers/phy/qualcomm/phy-qcom-qmp.c           | 160 +++++++++++++++++-
 drivers/phy/qualcomm/phy-qcom-qmp.h           |  64 ++++++-
 3 files changed, 224 insertions(+), 2 deletions(-)

Comments

Vinod Koul May 31, 2021, 6:08 a.m. UTC | #1 
On 27-04-21, 12:23, Manivannan Sadhasivam wrote:
> Hi,

> 

> This series adds support for PCIe PHY found in Qualcomm SDX55 platform.

> The PHY version is v4.20 which has different register offsets compared with

> previous v4.0x versions. So separate defines are introducted to handle the

> differences.

> 

> This series has been tested on Telit FN980 EVB with an out of tree PCIe Endpoint

> driver.


Applied, thanks

I got a conflict on last patch as Dimitry has already added some defines
in the header.. Pls check everything was applied cleanly

Thanks
-- 
~Vinod