From patchwork Wed Mar 24 06:37:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 408368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67C9BC433C1 for ; Wed, 24 Mar 2021 06:39:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2F405619C7 for ; Wed, 24 Mar 2021 06:39:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230071AbhCXGi1 (ORCPT ); Wed, 24 Mar 2021 02:38:27 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:34664 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229764AbhCXGiS (ORCPT ); Wed, 24 Mar 2021 02:38:18 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12O6c5Ia069595; Wed, 24 Mar 2021 01:38:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1616567885; bh=OafF6wJwhVSd3dBUNqHOK7IKMis1VR4ZQ+wmHHRnODc=; h=From:To:CC:Subject:Date; b=NYX+CciwxFaS2RPUaZrY4eEJ2aTsGwvZTDwMDkQaQqMqBz7LSfYw2/QxpQCFDapoW GqiVQBpMg9nPHtYRST+fnTHjgT/uZvbJcbArZizVI8Tq0DKbhvBlDQAxWIOzbp6+P9 LByGoGEODkc0/fQBR9uD+1pP2/+K+fu1muAZaelA= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12O6c5Al128850 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 24 Mar 2021 01:38:05 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 24 Mar 2021 01:38:05 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 24 Mar 2021 01:38:05 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12O6c2c6014513; Wed, 24 Mar 2021 01:38:02 -0500 From: Aswath Govindraju CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Aswath Govindraju , Nishanth Menon , Tero Kristo , Rob Herring , , , Subject: [PATCH v8 0/3] J7200: Add support for GPIO and higher speed modes in MMCSD subsystems Date: Wed, 24 Mar 2021 12:07:56 +0530 Message-ID: <20210324063759.5837-1-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The following series of patches - Add support for GPIO subsystem in main and wakeup domains. - Add voltage regulator device tree nodes and their corresponding pinmux to support power cycle and voltage switch required for UHS-I modes - sets respective tags in sdhci0 node to support higher speeds - remove no-1-8-v tag from sdhci1 node to support UHS-I modes - Update delay values for various speed modes supported. test logs - eMMC HS400 speed mode https://pastebin.ubuntu.com/p/pRzV2ZvSJZ/ - SD SDR104 speed mode https://pastebin.ubuntu.com/p/n64PNdDy2v/ - GPIO logs https://pastebin.ubuntu.com/p/HDBBMwMcdj/ Changes since v7: - Added the voltage regulator nodes to indicate the complete power flow for MMCSD1 subsystem - Corrected minor errors in DT nodes - Reran the tests. - Rebased the series Changes since v6: - Corrected the node name from vdd_sd_dv_pins_default to vdd-sd-dv-pins-default Changes since v5: - Corrected the link in patch 3 as it broken. - Added the version number for the references used in patch 3. - picked up reviewed-by from grygorii for patches 1 and 2. Changes since v4: - Added main_i2c0 pinmux required for doing power cycles to MMCSD1 subsystem - Updated delay values for various speed modes supported - Corrected the ti,ngpio property to indicate highest gpio lines that can be accessed. - Reran the performace tests Changes since v3: - Removed patch (1 in v3). - Rebased and included patches that add support for GPIO from series [1]. - Re-ran the performace tests for SD and eMMC. Changes since v2: - Added main_gpio0 DT node - Added voltage regulator device tree nodes required to support UHS-I modes Changes since v1: - squashed the two patches into one - added performance logs for the above mentioned speed modes Aswath Govindraju (1): arm64: dts: ti: k3-j7200: Add support for higher speed modes and update delay select values for MMCSD subsystems Faiz Abbas (2): arm64: dts: ti: k3-j7200: Add gpio nodes arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio modules .../dts/ti/k3-j7200-common-proc-board.dts | 94 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 86 ++++++++++++++++- .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 34 +++++++ 3 files changed, 212 insertions(+), 2 deletions(-) Reviewed-by: Kishon Vijay Abraham I