| Message ID | 20210125142431.1049668-1-geert+renesas@glider.be |
|---|---|
| Headers | show |
| Series | dmaengine: rcar-dmac: Add support for R-Car V3U | expand |
Hi Geert, Thank you for the patch. On Mon, Jan 25, 2021 at 03:24:30PM +0100, Geert Uytterhoeven wrote: > Extract the code to clear the status of one or all channels into their > own helpers, to prepare for the different handling of the R-Car V3U SoC. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > v2: > - No changes. > --- > drivers/dma/sh/rcar-dmac.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c > index 537550b4121bbc22..7a0f802c61e5152d 100644 > --- a/drivers/dma/sh/rcar-dmac.c > +++ b/drivers/dma/sh/rcar-dmac.c > @@ -336,6 +336,17 @@ static void rcar_dmac_chan_write(struct rcar_dmac_chan *chan, u32 reg, u32 data) > writel(data, chan->iomem + reg); > } > > +static void rcar_dmac_chan_clear(struct rcar_dmac *dmac, > + struct rcar_dmac_chan *chan) > +{ > + rcar_dmac_write(dmac, RCAR_DMACHCLR, BIT(chan->index)); > +} > + > +static void rcar_dmac_chan_clear_all(struct rcar_dmac *dmac) > +{ > + rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask); > +} > + > /* ----------------------------------------------------------------------------- > * Initialization and configuration > */ > @@ -451,7 +462,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac) > u16 dmaor; > > /* Clear all channels and enable the DMAC globally. */ > - rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask); > + rcar_dmac_chan_clear_all(dmac); > rcar_dmac_write(dmac, RCAR_DMAOR, > RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME); > > @@ -1566,7 +1577,7 @@ static irqreturn_t rcar_dmac_isr_channel(int irq, void *dev) > * because channel is already stopped in error case. > * We need to clear register and check DE bit as recovery. > */ > - rcar_dmac_write(dmac, RCAR_DMACHCLR, 1 << chan->index); > + rcar_dmac_chan_clear(dmac, chan); > rcar_dmac_chcr_de_barrier(chan); > reinit = true; > goto spin_lock_end;
Hi Vinod, This patch series adds support for the Direct Memory Access Controller variant in the Renesas R-Car V3U (R8A779A0) SoC, to both DT bindings and driver. Changes compared to v1: - Add Reviewed-by, - Put the full loop control of for_each_rcar_dmac_chan() on a single line, to improve readability, - Use two separate named regions instead of array, - Drop rcar_dmac_of_data.chan_reg_block, check for !rcar_dmac_of_data.chan_offset_base instead, - Precalculate chan_base in rcar_dmac_probe(). This has been tested on the Renesas Falcon board, using external SPI loopback (spi-loopback-test) on MSIOF1 and MSIOF2. Thanks! Geert Uytterhoeven (4): dt-bindings: renesas,rcar-dmac: Add r8a779a0 support dmaengine: rcar-dmac: Add for_each_rcar_dmac_chan() helper dmaengine: rcar-dmac: Add helpers for clearing DMA channel status dmaengine: rcar-dmac: Add support for R-Car V3U .../bindings/dma/renesas,rcar-dmac.yaml | 76 ++++++++----- drivers/dma/sh/rcar-dmac.c | 105 +++++++++++++----- 2 files changed, 123 insertions(+), 58 deletions(-)