| Message ID | 20210102205904.2691120-1-martin.blumenstingl@googlemail.com |
|---|---|
| Headers | show |
| Series | Amlogic Meson Always-On ARC remote-processor support | expand |
On Sat, 02 Jan 2021 21:59:00 +0100, Martin Blumenstingl wrote: > Amlogic Meson8, Meson8b and Meson8m2 SoCs embed an ARC EM4 core > typically used for managing system suspend. A section of the SoCs SRAM > is mapped as memory for this ARC core. Add new compatible strings for > the SRAM section for the ARC core memory. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > Documentation/devicetree/bindings/sram/sram.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
On 02/01/2021 21:59, Martin Blumenstingl wrote: > The 32-bit Amlogic Meson SoCs embed an ARC processor in the Always-On > power domain which is typically used for managing system suspend. The > memory for this ARC core is taken from the AHB SRAM area. Depending on > the actual SoC a different ARC core is used: > - Meson6 and earlier: some ARCv1 ISA based core (probably an ARC625) > - Meson8 and later: an ARC EM4 (ARCv2 ISA) based core > > Add the device-tree node for this remote-processor along with the > required SRAM sections, clocks and reset-lines. Also use the > SoC-specific compatible string to manage any differences (should > they exist). > > On Meson8, Meson8b and Meson8m2 the "secbus2" IO region is needed as > some bits need to be programmed there. Add this IO region for those > SoCs as well. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson8.dtsi | 21 +++++++++++++++++++++ > arch/arm/boot/dts/meson8b.dtsi | 21 +++++++++++++++++++++ > 3 files changed, 49 insertions(+) > > diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi > index e0ca5f08d07d..8bae6ed0abb2 100644 > --- a/arch/arm/boot/dts/meson.dtsi > +++ b/arch/arm/boot/dts/meson.dtsi > @@ -200,6 +200,13 @@ aobus: aobus@c8100000 { > #size-cells = <1>; > ranges = <0x0 0xc8100000 0x100000>; > > + ao_arc_rproc: remoteproc@1c { > + compatible= "amlogic,meson-mx-ao-arc"; > + reg = <0x1c 0x8>, <0x38 0x8>; > + reg-names = "remap", "cpu"; > + status = "disabled"; > + }; > + > ir_receiver: ir-receiver@480 { > compatible= "amlogic,meson6-ir"; > reg = <0x480 0x20>; > diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi > index 420324ea2ad7..157a950a55d3 100644 > --- a/arch/arm/boot/dts/meson8.dtsi > +++ b/arch/arm/boot/dts/meson8.dtsi > @@ -369,6 +369,14 @@ mux { > }; > }; > > +&ao_arc_rproc { > + compatible= "amlogic,meson8-ao-arc", "amlogic,meson-mx-ao-arc"; > + amlogic,secbus2 = <&secbus2>; > + sram = <&ao_arc_sram>; > + resets = <&reset RESET_MEDIA_CPU>; > + clocks = <&clkc CLKID_AO_MEDIA_CPU>; > +}; > + > &cbus { > reset: reset-controller@4404 { > compatible = "amlogic,meson8b-reset"; > @@ -496,6 +504,12 @@ mux { > }; > > &ahb_sram { > + ao_arc_sram: ao-arc-sram@0 { > + compatible = "amlogic,meson8-ao-arc-sram"; > + reg = <0x0 0x8000>; > + pool; > + }; > + > smp-sram@1ff80 { > compatible = "amlogic,meson8-smp-sram"; > reg = <0x1ff80 0x8>; > @@ -631,6 +645,13 @@ &sdhc { > clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; > }; > > +&secbus { > + secbus2: system-controller@4000 { > + compatible = "amlogic,meson8-secbus2", "syscon"; > + reg = <0x4000 0x2000>; > + }; > +}; > + > &sdio { > compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio"; > clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; > diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi > index dbf7963b6c87..c02b03cbcdf4 100644 > --- a/arch/arm/boot/dts/meson8b.dtsi > +++ b/arch/arm/boot/dts/meson8b.dtsi > @@ -320,6 +320,14 @@ mux { > }; > }; > > +&ao_arc_rproc { > + compatible= "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc"; > + amlogic,secbus2 = <&secbus2>; > + sram = <&ao_arc_sram>; > + resets = <&reset RESET_MEDIA_CPU>; > + clocks = <&clkc CLKID_AO_MEDIA_CPU>; > +}; > + > &cbus { > reset: reset-controller@4404 { > compatible = "amlogic,meson8b-reset"; > @@ -464,6 +472,12 @@ mux { > }; > > &ahb_sram { > + ao_arc_sram: ao-arc-sram@0 { > + compatible = "amlogic,meson8b-ao-arc-sram"; > + reg = <0x0 0x8000>; > + pool; > + }; > + > smp-sram@1ff80 { > compatible = "amlogic,meson8b-smp-sram"; > reg = <0x1ff80 0x8>; > @@ -628,6 +642,13 @@ &sdhc { > clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; > }; > > +&secbus { > + secbus2: system-controller@4000 { > + compatible = "amlogic,meson8b-secbus2", "syscon"; > + reg = <0x4000 0x2000>; > + }; > +}; > + > &sdio { > compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio"; > clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Hi Martin, On Sat, Jan 02, 2021 at 09:59:03PM +0100, Martin Blumenstingl wrote: > Amlogic Meson6, Meson8, Meson8b and Meson8m2 embed an ARC core in the > Always-On (AO) power-domain. This is typically used for waking up the > ARM cores after system suspend. > > The configuration is spread across three different registers: > - AO_REMAP_REG0 which must be programmed to zero, it's actual purpose > is unknown. There is a second remap register which is not used in the > vendor kernel (which served as reference for this driver). > - AO_CPU_CNTL is used to start and stop the ARC core. > - AO_SECURE_REG0 in the SECBUS2 register area with unknown purpose. I certainly appreciate your candor. > > To boot the ARC core we also need to enable it's gate clock and trigger > a reset. > > The actual code for this ARC core can come from an ELF binary, for > example by building the Zephyr RTOS for an ARC EM4 core and then taking > "zephyr.elf" as firmware. This executable does not have any "rsc table" > so we are skipping rproc_elf_load_rsc_table (rproc_ops.parse_fw) and > rproc_elf_find_loaded_rsc_table (rproc_ops.find_loaded_rsc_table). > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > drivers/remoteproc/Kconfig | 11 ++ > drivers/remoteproc/Makefile | 1 + > drivers/remoteproc/meson_mx_ao_arc.c | 240 +++++++++++++++++++++++++++ > 3 files changed, 252 insertions(+) > create mode 100644 drivers/remoteproc/meson_mx_ao_arc.c > > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig > index 9e7efe542f69..0e7fb91635fe 100644 > --- a/drivers/remoteproc/Kconfig > +++ b/drivers/remoteproc/Kconfig > @@ -125,6 +125,17 @@ config KEYSTONE_REMOTEPROC > It's safe to say N here if you're not interested in the Keystone > DSPs or just want to use a bare minimum kernel. > > +config MESON_MX_AO_ARC_REMOTEPROC > + tristate "Amlogic Meson6/8/8b/8m2 AO ARC remote processor support" > + depends on HAS_IOMEM > + depends on (ARM && ARCH_MESON) || COMPILE_TEST > + select GENERIC_ALLOCATOR > + help > + Say m or y here to have support for the AO ARC remote processor > + on Amlogic Meson6/Meson8/Meson8b/Meson8m2 SoCs. This is > + typically used for system suspend. > + If unusre say N. s/unusre/unsure > + > config PRU_REMOTEPROC > tristate "TI PRU remoteproc support" > depends on TI_PRUSS > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile > index bb26c9e4ef9c..ce1abeb30907 100644 > --- a/drivers/remoteproc/Makefile > +++ b/drivers/remoteproc/Makefile > @@ -18,6 +18,7 @@ obj-$(CONFIG_OMAP_REMOTEPROC) += omap_remoteproc.o > obj-$(CONFIG_WKUP_M3_RPROC) += wkup_m3_rproc.o > obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o > obj-$(CONFIG_KEYSTONE_REMOTEPROC) += keystone_remoteproc.o > +obj-$(CONFIG_MESON_MX_AO_ARC_REMOTEPROC)+= meson_mx_ao_arc.o > obj-$(CONFIG_PRU_REMOTEPROC) += pru_rproc.o > obj-$(CONFIG_QCOM_PIL_INFO) += qcom_pil_info.o > obj-$(CONFIG_QCOM_RPROC_COMMON) += qcom_common.o > diff --git a/drivers/remoteproc/meson_mx_ao_arc.c b/drivers/remoteproc/meson_mx_ao_arc.c > new file mode 100644 > index 000000000000..1deb03ca30f4 > --- /dev/null > +++ b/drivers/remoteproc/meson_mx_ao_arc.c > @@ -0,0 +1,240 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Copyright (C) 2020 Martin Blumenstingl <martin.blumenstingl@googlemail.com> > + */ > + > +#include <linux/bitfield.h> > +#include <linux/bitops.h> > +#include <linux/clk.h> > +#include <linux/delay.h> > +#include <linux/property.h> Is it possible for this to go after platform_device.h? > +#include <linux/genalloc.h> > +#include <linux/io.h> > +#include <linux/ioport.h> > +#include <linux/mfd/syscon.h> > +#include <linux/module.h> > +#include <linux/platform_device.h> > +#include <linux/regmap.h> > +#include <linux/remoteproc.h> > +#include <linux/reset.h> > +#include <linux/sizes.h> > + > +#include "remoteproc_internal.h" > + > +#define AO_REMAP_REG0 0x0 > +#define AO_REMAP_REG1 0x4 > + > +#define AO_CPU_CNTL 0x0 > + #define AO_CPU_CNTL_MEM_ADDR_UPPER GENMASK(28, 16) > + #define AO_CPU_CNTL_HALT BIT(9) > + #define AO_CPU_CNTL_UNKNONWN BIT(8) > + #define AO_CPU_CNTL_RUN BIT(0) Any reason for the extra tabulation at the beginning of the lines? > + > +#define AO_CPU_STAT 0x4 > + > +#define AO_SECURE_REG0 0x0 > + #define AO_SECURE_REG0_UNKNOWN GENMASK(23, 8) > + > +#define MESON_AO_RPROC_SRAM_USABLE_BITS GENMASK(31, 20) As per your comments in the cover letter I assume we don't know more about this? > +#define MESON_AO_RPROC_MEMORY_OFFSET 0x10000000 > + > +struct meson_mx_ao_arc_rproc_priv { > + void __iomem *remap_base; > + void __iomem *cpu_base; > + unsigned long sram_va; > + phys_addr_t sram_pa; > + size_t sram_size; > + struct gen_pool *sram_pool; > + struct reset_control *arc_reset; > + struct clk *arc_pclk; > + struct regmap *secbus2_regmap; > +}; > + > +static int meson_mx_ao_arc_rproc_start(struct rproc *rproc) > +{ > + struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; > + phys_addr_t phys_addr; > + int ret; > + > + ret = clk_prepare_enable(priv->arc_pclk); > + if (ret) > + return ret; > + > + writel(0, priv->remap_base + AO_REMAP_REG0); > + usleep_range(10, 100); That's wonderful - here too I assume there is no indication as to why this is needed? > + > + regmap_update_bits(priv->secbus2_regmap, AO_SECURE_REG0, > + AO_SECURE_REG0_UNKNOWN, 0); > + > + ret = reset_control_reset(priv->arc_reset); > + if (ret) { > + clk_disable_unprepare(priv->arc_pclk); > + return ret; > + } > + > + usleep_range(10, 100); > + > + /* convert from 0xd9000000 to 0xc9000000 as the vendor driver does */ > + phys_addr = priv->sram_pa - MESON_AO_RPROC_MEMORY_OFFSET; > + > + writel(FIELD_PREP(AO_CPU_CNTL_MEM_ADDR_UPPER, > + FIELD_GET(MESON_AO_RPROC_SRAM_USABLE_BITS, phys_addr)) | > + AO_CPU_CNTL_UNKNONWN | AO_CPU_CNTL_RUN, This is really hard to read - please unpack. > + priv->cpu_base + AO_CPU_CNTL); > + usleep_range(20, 200); > + > + return 0; > +} > + > +static int meson_mx_ao_arc_rproc_stop(struct rproc *rproc) > +{ > + struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; > + > + writel(AO_CPU_CNTL_HALT, priv->cpu_base + AO_CPU_CNTL); > + > + clk_disable_unprepare(priv->arc_pclk); > + > + return 0; > +} > + > +static void *meson_mx_ao_arc_rproc_da_to_va(struct rproc *rproc, u64 da, > + size_t len) > +{ > + struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; > + > + if ((da + len) >= priv->sram_size) > + return NULL; This isn't an index so it should be '>' rather than '>='. You should be able to ask for the whole range and get it, which the above prevents you from doing. Moreover are you sure 'da' always starts at 0? This seems to be at odds with your comment in meson_mx_ao_arc_rproc_start() about converting from 0xd9000000 to 0xc9000000. > + > + return (void *)priv->sram_va + da; > +} > + > +static struct rproc_ops meson_mx_ao_arc_rproc_ops = { > + .start = meson_mx_ao_arc_rproc_start, > + .stop = meson_mx_ao_arc_rproc_stop, > + .da_to_va = meson_mx_ao_arc_rproc_da_to_va, > + .get_boot_addr = rproc_elf_get_boot_addr, > + .load = rproc_elf_load_segments, > + .sanity_check = rproc_elf_sanity_check, > +}; > + > +static int meson_mx_ao_arc_rproc_probe(struct platform_device *pdev) > +{ > + struct meson_mx_ao_arc_rproc_priv *priv; > + struct platform_device *secbus2_pdev; > + struct device *dev = &pdev->dev; > + const char *fw_name; > + struct rproc *rproc; > + int ret; > + > + ret = device_property_read_string(dev, "firmware-name", &fw_name); I would have expected of_property_read_string() but that is also fine. > + if (ret) > + fw_name = NULL; > + > + rproc = devm_rproc_alloc(dev, "meson-mx-ao-arc", > + &meson_mx_ao_arc_rproc_ops, fw_name, > + sizeof(*priv)); > + if (!rproc) > + return -ENOMEM; > + > + rproc->has_iommu = false; > + priv = rproc->priv; > + > + priv->sram_pool = of_gen_pool_get(dev->of_node, "sram", 0); > + if (!priv->sram_pool) { > + dev_err(dev, "Could not get SRAM pool\n"); > + return -ENODEV; > + } > + > + priv->sram_size = gen_pool_avail(priv->sram_pool); > + > + priv->sram_va = gen_pool_alloc(priv->sram_pool, priv->sram_size); > + if (!priv->sram_va) { > + dev_err(dev, "Could not alloc memory in SRAM pool\n"); > + return -ENOMEM; > + } > + > + priv->sram_pa = gen_pool_virt_to_phys(priv->sram_pool, priv->sram_va); > + if (priv->sram_pa & ~MESON_AO_RPROC_SRAM_USABLE_BITS) { > + dev_err(dev, "SRAM address contains unusable bits\n"); > + ret = -EINVAL; > + goto err_free_genpool; > + } > + > + priv->secbus2_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, > + "amlogic,secbus2"); > + if (IS_ERR(priv->secbus2_regmap)) { > + dev_err(dev, "Failed to find SECBUS2 regmap\n"); > + ret = PTR_ERR(priv->secbus2_regmap); > + goto err_free_genpool; > + } > + > + priv->remap_base = devm_platform_ioremap_resource_byname(pdev, "remap"); > + if (IS_ERR(priv->remap_base)) { > + ret = PTR_ERR(priv->remap_base); > + goto err_free_genpool; > + } > + > + priv->cpu_base = devm_platform_ioremap_resource_byname(pdev, "cpu"); > + if (IS_ERR(priv->cpu_base)) { > + ret = PTR_ERR(priv->cpu_base); > + goto err_free_genpool; > + } > + > + priv->arc_reset = devm_reset_control_get_exclusive(dev, NULL); > + if (IS_ERR(priv->arc_reset)) { Looking at __devm_reset_control_get(), this should probably be IS_ERR_OR_NULL(). Thanks, Mathieu > + dev_err(dev, "Failed to get ARC reset\n"); > + ret = PTR_ERR(priv->arc_reset); > + goto err_free_genpool; > + } > + > + priv->arc_pclk = devm_clk_get(dev, NULL); > + if (IS_ERR(priv->arc_pclk)) { > + dev_err(dev, "Failed to get the ARC PCLK\n"); > + ret = PTR_ERR(priv->arc_pclk); > + goto err_free_genpool; > + } > + > + platform_set_drvdata(pdev, rproc); > + > + ret = rproc_add(rproc); > + if (ret) > + goto err_free_genpool; > + > + return 0; > + > +err_free_genpool: > + gen_pool_free(priv->sram_pool, priv->sram_va, priv->sram_size); > + return ret; > +} > + > +static int meson_mx_ao_arc_rproc_remove(struct platform_device *pdev) > +{ > + struct rproc *rproc = platform_get_drvdata(pdev); > + struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; > + > + rproc_del(rproc); > + gen_pool_free(priv->sram_pool, priv->sram_va, priv->sram_size); > + > + return 0; > +} > + > +static const struct of_device_id meson_mx_ao_arc_rproc_match[] = { > + { .compatible = "amlogic,meson8-ao-arc" }, > + { .compatible = "amlogic,meson8b-ao-arc" }, > + { /* sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, meson_mx_ao_arc_rproc_match); > + > +static struct platform_driver meson_mx_ao_arc_rproc_driver = { > + .probe = meson_mx_ao_arc_rproc_probe, > + .remove = meson_mx_ao_arc_rproc_remove, > + .driver = { > + .name = "meson-mx-ao-arc-rproc", > + .of_match_table = of_match_ptr(meson_mx_ao_arc_rproc_match), > + }, > +}; > +module_platform_driver(meson_mx_ao_arc_rproc_driver); > + > +MODULE_DESCRIPTION("Amlogic Meson6/8/8b/8m2 AO ARC remote processor driver"); > +MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>"); > +MODULE_LICENSE("GPL v2"); > -- > 2.30.0 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hi Mathieu, thank you for taking the time to go through my patch! On Wed, Jan 13, 2021 at 12:43 AM Mathieu Poirier <mathieu.poirier@linaro.org> wrote: [...] > > + If unusre say N. > > s/unusre/unsure godo catch, noted. [...] > > +#include <linux/property.h> > > Is it possible for this to go after platform_device.h? I think so, not sure why this is not in alphabetical order [...] > > +#define AO_CPU_CNTL 0x0 > > + #define AO_CPU_CNTL_MEM_ADDR_UPPER GENMASK(28, 16) > > + #define AO_CPU_CNTL_HALT BIT(9) > > + #define AO_CPU_CNTL_UNKNONWN BIT(8) > > + #define AO_CPU_CNTL_RUN BIT(0) > > Any reason for the extra tabulation at the beginning of the lines? not really, I think I did the same thing as in drivers/iio/adc/meson_saradc.c where the register itself starts at the beginning of the line and each bit(mask) starts indented I'll change this for the next version [...] > > +#define MESON_AO_RPROC_SRAM_USABLE_BITS GENMASK(31, 20) > > As per your comments in the cover letter I assume we don't know more about this? unfortunately not, but I'll still try to get some more information from someone at Amlogic. That said, this is "legacy" hardware for them so I can't make any promises. > > +#define MESON_AO_RPROC_MEMORY_OFFSET 0x10000000 > > + > > +struct meson_mx_ao_arc_rproc_priv { > > + void __iomem *remap_base; > > + void __iomem *cpu_base; > > + unsigned long sram_va; > > + phys_addr_t sram_pa; > > + size_t sram_size; > > + struct gen_pool *sram_pool; > > + struct reset_control *arc_reset; > > + struct clk *arc_pclk; > > + struct regmap *secbus2_regmap; > > +}; > > + > > +static int meson_mx_ao_arc_rproc_start(struct rproc *rproc) > > +{ > > + struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; > > + phys_addr_t phys_addr; > > + int ret; > > + > > + ret = clk_prepare_enable(priv->arc_pclk); > > + if (ret) > > + return ret; > > + > > + writel(0, priv->remap_base + AO_REMAP_REG0); > > + usleep_range(10, 100); > > That's wonderful - here too I assume there is no indication as to why this is > needed? looking at this again: the vendor driver only has a delay after pulsing the reset line I will double check and hopefully remove this usleep_range and only keep the one below (after pulsing the reset line) [...] > > +static void *meson_mx_ao_arc_rproc_da_to_va(struct rproc *rproc, u64 da, > > + size_t len) > > +{ > > + struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; > > + > > + if ((da + len) >= priv->sram_size) > > + return NULL; > > This isn't an index so it should be '>' rather than '>='. You should be able to > ask for the whole range and get it, which the above prevents you from doing. > > Moreover are you sure 'da' always starts at 0? This seems to be at odds with > your comment in meson_mx_ao_arc_rproc_start() about converting from 0xd9000000 > to 0xc9000000. thanks for both of these comments, I'll address this in the next version [...] > > + priv->arc_reset = devm_reset_control_get_exclusive(dev, NULL); > > + if (IS_ERR(priv->arc_reset)) { > > Looking at __devm_reset_control_get(), this should probably be IS_ERR_OR_NULL(). as far as I know only devm_reset_control_get_optional_exclusive (the important bit is "optional" - I am using the "mandatory/not optional" variant) can return NULL, all other variants return PTR_ERR or a valid reset_control. Best regards, Martin
Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes: > Amlogic Meson6/8/8b/8m2 come with an ARC core in the Always-On (AO) > power-domain. This is typically used for waking up the ARM CPU after > powering it down for system suspend. > > The exact ARC core used on Meson6 and earlier is not known. I believe > it is an ARC625, but I am not sure about this. Meson8/8b/8m2 uses an > ARC EM4 core. > They all have in common that they use a section of the SoCs SRAM for > running code on the ARC core. > > Unfortunately there's no information about the remote-processor control > registers in the public Meson8b (S805) datasheet. All information is > either taken from Amlogic's 3.10 kernel and 2011-03 u-boot or found by > testing (for example the clock input is not mentioned anywhere in the > reference code, but disabling it stops the AO ARC core from working). > > This series consists of five patches: > 1: dt-bindings for the SRAM section > 2: dt-bindings for the SECBUS2 syscon region which contains a few > bits for controlling this remote processor > 3: dt-bindings for the AO ARC remote processor > 4: the driver for booting code on the AO ARC remote processor > 5: (only included for documentation purposes) dts changes (these will > be re-sent separately) > > Patches #3 and #4 should go through the remoteproc tree. Patches #1 > and #2 may go through Rob's (devicetree) tree, Kevin's linux-amlogic > tree or through the remoteproc tree. Personally I have no preference > here. > > To test this series I ported the Amlogic serial driver and added the > board files for the Amlogic AO ARC EM4 to the Zephyr RTOS. The code can > be found here: [0] (the resulting zephyr.elf can then be loaded as > remote-processor firmware from Linux). > > > Changes since v1 at [1]: > - fixed yamllint warnings (after installing the package these now also > show up on my build machine) in patches #2 and #3. Thanks for the > hint Rob > - dropped the explicit "select" statement from the dt-bindings in patch > #2 as suggested by Rob (thanks) > > > [0] https://github.com/xdarklight/zephyr-rtos/commits/amlogic_ao_em4-20201229 > [1] https://patchwork.kernel.org/project/linux-amlogic/list/?series=407349 > > > Martin Blumenstingl (5): > dt-bindings: sram: Add compatible strings for the Meson AO ARC SRAM > dt-bindings: Amlogic: add the documentation for the SECBUS2 registers > dt-bindings: remoteproc: Add the documentation for Meson AO ARC rproc > remoteproc: meson-mx-ao-arc: Add a driver for the AO ARC remote > procesor > ARM: dts: meson: add the AO ARC remote processor Patches 1-2, 5 queued for v5.12 via the amlogic tree. Kevin
Amlogic Meson6/8/8b/8m2 come with an ARC core in the Always-On (AO) power-domain. This is typically used for waking up the ARM CPU after powering it down for system suspend. The exact ARC core used on Meson6 and earlier is not known. I believe it is an ARC625, but I am not sure about this. Meson8/8b/8m2 uses an ARC EM4 core. They all have in common that they use a section of the SoCs SRAM for running code on the ARC core. Unfortunately there's no information about the remote-processor control registers in the public Meson8b (S805) datasheet. All information is either taken from Amlogic's 3.10 kernel and 2011-03 u-boot or found by testing (for example the clock input is not mentioned anywhere in the reference code, but disabling it stops the AO ARC core from working). This series consists of five patches: 1: dt-bindings for the SRAM section 2: dt-bindings for the SECBUS2 syscon region which contains a few bits for controlling this remote processor 3: dt-bindings for the AO ARC remote processor 4: the driver for booting code on the AO ARC remote processor 5: (only included for documentation purposes) dts changes (these will be re-sent separately) Patches #3 and #4 should go through the remoteproc tree. Patches #1 and #2 may go through Rob's (devicetree) tree, Kevin's linux-amlogic tree or through the remoteproc tree. Personally I have no preference here. To test this series I ported the Amlogic serial driver and added the board files for the Amlogic AO ARC EM4 to the Zephyr RTOS. The code can be found here: [0] (the resulting zephyr.elf can then be loaded as remote-processor firmware from Linux). Changes since v1 at [1]: - fixed yamllint warnings (after installing the package these now also show up on my build machine) in patches #2 and #3. Thanks for the hint Rob - dropped the explicit "select" statement from the dt-bindings in patch #2 as suggested by Rob (thanks) [0] https://github.com/xdarklight/zephyr-rtos/commits/amlogic_ao_em4-20201229 [1] https://patchwork.kernel.org/project/linux-amlogic/list/?series=407349 Martin Blumenstingl (5): dt-bindings: sram: Add compatible strings for the Meson AO ARC SRAM dt-bindings: Amlogic: add the documentation for the SECBUS2 registers dt-bindings: remoteproc: Add the documentation for Meson AO ARC rproc remoteproc: meson-mx-ao-arc: Add a driver for the AO ARC remote procesor ARM: dts: meson: add the AO ARC remote processor .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 42 +++ .../remoteproc/amlogic,meson-mx-ao-arc.yaml | 87 +++++++ .../devicetree/bindings/sram/sram.yaml | 2 + arch/arm/boot/dts/meson.dtsi | 7 + arch/arm/boot/dts/meson8.dtsi | 21 ++ arch/arm/boot/dts/meson8b.dtsi | 21 ++ drivers/remoteproc/Kconfig | 11 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/meson_mx_ao_arc.c | 240 ++++++++++++++++++ 9 files changed, 432 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml create mode 100644 Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml create mode 100644 drivers/remoteproc/meson_mx_ao_arc.c