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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id t133sm14607355qke.82.2020.11.17.05.47.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Nov 2020 05:47:15 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 0/6] Enable Qualcomm Crypto Engine on sdm845 Date: Tue, 17 Nov 2020 08:47:08 -0500 Message-Id: <20201117134714.3456446-1-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Qualcomm crypto engine supports hardware accelerated algorithms for encryption and authentication. Enable support for aes,des,3des encryption algorithms and sha1,sha256, hmac(sha1),hmac(sha256) authentication algorithms on sdm845.The patch series has been tested using the kernel crypto testing module tcrypto.ko. Thara Gopinath (6): dt-binding:clock: Add entry for crypto engine RPMH clock resource clk:qcom:rpmh: Add CE clock on sdm845. drivers:crypto:qce: Enable support for crypto engine on sdm845. drivers:crypto:qce: Fix SHA result buffer corruption issues. dts:qcom:sdm845: Add dt entries to support crypto engine. devicetree:bindings:crypto: Extend qcom-qce binding to add support for crypto engine version 5.4 .../devicetree/bindings/crypto/qcom-qce.txt | 4 ++- arch/arm64/boot/dts/qcom/sdm845.dtsi | 30 +++++++++++++++++++ drivers/clk/qcom/clk-rpmh.c | 2 ++ drivers/crypto/qce/core.c | 17 ++++++++++- drivers/crypto/qce/sha.c | 2 +- include/dt-bindings/clock/qcom,rpmh.h | 1 + 6 files changed, 53 insertions(+), 3 deletions(-) Reviewed-by: Bjorn Andersson Reviewed-by: Bjorn Andersson