From patchwork Mon Oct 12 06:12:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317615 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332330ilm; Sun, 11 Oct 2020 23:12:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyotBCCWaQyprkVtkcLrvJJ8OGq/pT63CbNYkoDh1NJmpcnfxbDX1wE2QUGIv4kOsCX7nOq X-Received: by 2002:a05:6402:b0e:: with SMTP id bm14mr12380478edb.19.1602483168741; Sun, 11 Oct 2020 23:12:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483168; cv=none; d=google.com; s=arc-20160816; b=djutgiDBFxOy5Bu6OwlnYjlW76GZQ+TXNKquISqGOLdutzo/WBHATl6QYZVZVBDpej KrqJNlewdImc+bEuWLrDvX0VQOvxiQ1Fa0eXcq8hAH9/axLzk1KC0lkX2EjvEBgl7h0j 51VggXWbDr7XG+wKAqEgVTd23fMi163yVuEC0q3bX+lN2FVrG/+QlZXwaQAbVyxafrNG aa0i33DjX0S/REBmWlxPX14Fw0mA43wJ2qLtqILMzzz9tFQELTvnt+EC7UbPjKzcZPnW u+ivsWFsgx2QTvHYa3GCwymX5q+SbEuex+J0EPSmxOeShExWIqxUK1FVJNa7iR88GmSB zUnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=T9PUfUjizNpnR4DE3OjHD9Oy0VQYzbX+PkZmG8lWy3Y=; b=yD7ccjy+zSPPEvmTIrrbxEbt/VdUFw6s0vdZfj8BUyDX58UPSXD5ci/KsXbBlcLzYr Pzp3jLNYjUNPI67OwFnvmJLr4ietWcbcFvHJOcZA7i2Ojp4uThei7WDkDJsva4zOvw6w 952GFuCSu8h81qidRjLGeM/tZXNFO+YfJDFuNEvHF8UuvrqdM0gmSrTD4x8uFugbyNrt B3IU3/8K4g0e9nz8SRG5NqVSkvo43zsHO+8OxlF58EQC304MIAWTfp84vaMiTlbKngkm V03gQPmQxlUzbx4n1P/bB84zj6EJa694+lyYDXwPq4/pMFfWTDjQqkMrv+gdSn26YpOK g5Iw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id co4si11556820edb.461.2020.10.11.23.12.48; Sun, 11 Oct 2020 23:12:48 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727216AbgJLGMs (ORCPT + 6 others); Mon, 12 Oct 2020 02:12:48 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33564 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727172AbgJLGMr (ORCPT ); Mon, 12 Oct 2020 02:12:47 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id BA150B73366EE4340348; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:35 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Date: Mon, 12 Oct 2020 14:12:15 +0800 Message-ID: <20201012061225.1597-1-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org v1 --> v2: Too deep in arm32. I forgot arm64. Add property "#reset-cells" into sysctrl.yaml (Patch 9). v1: These patches are based on the latest linux-next. Zhen Lei (10): ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml ARM: dts: hisilicon: fix errors detected by pl011.yaml ARM: dts: hisilicon: fix errors detected by usb yaml ARM: dts: hisilicon: fix errors detected by simple-bus.yaml ARM: dts: hisilicon: fix errors detected by root-node.yaml ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml ARM: dts: hisilicon: fix errors detected by syscon.yaml dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++- .../bindings/arm/hisilicon/controller/sysctrl.yaml | 28 +++++++++++++-- arch/arm/boot/dts/hi3519-demb.dts | 2 +- arch/arm/boot/dts/hi3519.dtsi | 32 ++++++++--------- arch/arm/boot/dts/hi3620-hi4511.dts | 24 ++++++------- arch/arm/boot/dts/hi3620.dtsi | 32 ++++++++--------- arch/arm/boot/dts/hip01-ca9x2.dts | 2 +- arch/arm/boot/dts/hip01.dtsi | 26 +++++++------- arch/arm/boot/dts/hip04-d01.dts | 2 +- arch/arm/boot/dts/hip04.dtsi | 6 ++-- arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 2 +- arch/arm/boot/dts/hisi-x5hd2.dtsi | 42 +++++++++++----------- 12 files changed, 136 insertions(+), 89 deletions(-) -- 1.8.3