From patchwork Wed Sep 9 06:58:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 249435 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp147638ilg; Tue, 8 Sep 2020 23:59:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx24yA6z6FBkk07kaH0kWzcb1F55ZImMlaxhtGuN+gluV0THNn0XDjRgmmVE8iouvNl15tV X-Received: by 2002:a50:9355:: with SMTP id n21mr2571727eda.237.1599634778167; Tue, 08 Sep 2020 23:59:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599634778; cv=none; d=google.com; s=arc-20160816; b=lwpXqTTYtepHMLHKS0lvckDHwYJktrDViqVDnQyJm9aFbxQFV0WUGglzYGbqaCWv7S EcxvE3uUafpEGLCx6/+sXyJVbMZE0ua/rW6gytbNYX5L0EsjbufngOL+ABtnjr6SIb9m xR0sQjEFDcYR+fh/WDxP3zjb7m5EBRqTv0+Y8HKSXeNNVK8jPhEPWu7LOksYUphdqLYF XqwGKLgoAAG3ala8jO3W68SMv/tjz5v2qF2Ha2HiC9xpm6Uwxg8pWNipG4/ouSkF7UQ/ tptw6/3HtJcfuH+NoycWCWXVeOpdO/cAyX7dF+TrM5+Ds5zYjyan84j8KQi1XlCi4dES k5lQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=tvSptaa4vJIOq7Eijz0aGYFMmjQtVNRDxGjjWHIvpFw=; b=fkUUXynyV6Qm4KIn7/gqU8x/T/fQe3upkic1wIY7zavvqdic5Q5QHopHLJ6wDtsN1q Q6ZRA29gyqnY3Nenv8f8icslnCmMb2gijuK9+pITNi/cyKtx1z5EROSEWQxLe0qNM1J4 N8heCNxLmPb0j9IiBV85x0P9yyj52Cxe+yCPVSjT5PulEYCuLAmqB7fbxxa8F09oZoWw 8BKdu4lqtC6PYPaSxFQ+7EjrJZ0Ag/1Cg+t/SfOtKdEj4qBvtXm3n7QMxjA04Xz2Vbva CUW4O/MIe/DpQCngm5ZxOGN8/3mG7qE15V77kjTbU7IW4XFUpF3SAmIkl20d35ZhLji+ xidQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mj21si920639ejb.271.2020.09.08.23.59.38; Tue, 08 Sep 2020 23:59:38 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726535AbgIIG7X (ORCPT + 6 others); Wed, 9 Sep 2020 02:59:23 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:55160 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726169AbgIIG7V (ORCPT ); Wed, 9 Sep 2020 02:59:21 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 512BF7CACEB8EFD54234; Wed, 9 Sep 2020 14:59:17 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.487.0; Wed, 9 Sep 2020 14:59:06 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , devicetree , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v3 0/3] irqchip: dw-apb-ictl: support hierarchy irq domain Date: Wed, 9 Sep 2020 14:58:33 +0800 Message-ID: <20200909065836.2631-1-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org v2 --> v3: 1. change (1 << hwirq) to BIT(hwirq). 2. change __exception_irq_entry to __irq_entry, so we can "#include " instead of "#include ". Ohterwise, an compilation error will be reported on arch/csky. drivers/irqchip/irq-dw-apb-ictl.c:20:10: fatal error: asm/exception.h: No such file or directory 3. use "if (!parent || (np == parent))" to determine whether it is primary interrupt controller. 4. make the primary interrupt controller case also use function handle_level_irq(), I used handle_fasteoi_irq() as flow_handler before. 5. Other minor changes are not detailed. v1 --> v2: According to Marc Zyngier's suggestion, discard adding an independent SD5203-VIC driver, but make the dw-apb-ictl irqchip driver to support hierarchy irq domain. It was originally available only for secondary interrupt controller, now it can also be used as primary interrupt controller. The related dt-bindings is updated appropriately. Add "Suggested-by: Marc Zyngier ". Add "Tested-by: Haoyu Lv ". v1: The interrupt controller of SD5203 SoC is VIC(vector interrupt controller), it's based on Synopsys DesignWare APB interrupt controller (dw_apb_ictl) IP, but it can not directly use dw_apb_ictl driver. The main reason is that VIC is used as primary interrupt controller and dw_apb_ictl driver worked for secondary interrupt controller. So add a new driver: "hisilicon,sd5203-vic". Zhen Lei (3): irqchip: dw-apb-ictl: prepare for support hierarchy irq domain irqchip: dw-apb-ictl: support hierarchy irq domain dt-bindings: dw-apb-ictl: support hierarchy irq domain .../interrupt-controller/snps,dw-apb-ictl.txt | 14 ++- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-dw-apb-ictl.c | 85 ++++++++++++++++--- 3 files changed, 87 insertions(+), 14 deletions(-) -- 2.26.0.106.g9fadedd