From patchwork Fri Jun 19 21:33:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Horia Geanta X-Patchwork-Id: 198776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B885CC433DF for ; Fri, 19 Jun 2020 21:34:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9C7CC21941 for ; Fri, 19 Jun 2020 21:34:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726899AbgFSVeW (ORCPT ); Fri, 19 Jun 2020 17:34:22 -0400 Received: from inva020.nxp.com ([92.121.34.13]:34216 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725554AbgFSVeW (ORCPT ); Fri, 19 Jun 2020 17:34:22 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 682E81A02C5; Fri, 19 Jun 2020 23:34:20 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 59E9E1A02BB; Fri, 19 Jun 2020 23:34:20 +0200 (CEST) Received: from fsr-ub1864-014.ea.freescale.net (fsr-ub1864-014.ea.freescale.net [10.171.95.219]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 9B9BB204B6; Fri, 19 Jun 2020 23:34:19 +0200 (CEST) From: =?utf-8?q?Horia_Geant=C4=83?= To: Rob Herring , Shawn Guo , Sascha Hauer , Matt Mackall , Herbert Xu Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Greg Kroah-Hartman , Martin Kaiser , Franck Lenormand , Iuliana Prodan , Silvano Di Ninno , linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/4] hwrng: add support for i.MX6 rngb Date: Sat, 20 Jun 2020 00:33:43 +0300 Message-Id: <20200619213347.27826-1-horia.geanta@nxp.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for RNGB found in some i.MX6 SoCs (6SL, 6SLL, 6ULL, 6ULZ), based on RNGC driver (drivers/char/hw_random/imx-rngc.c). This driver claims support also for RNGB (besides RNGC), and is currently used only by i.MX25. Note: All the i.MX6 SoCs with RNGB have a DCP (Data Co-Processor) crypto accelerator. Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020) also have a RNGB, however it's part of the CAAM (Cryptograhic Accelerator and Assurance Module) crypto accelerator. In this case, RNGB is managed in the caam driver (drivers/crypto/caam/), since it's tightly related to the caam "job ring" interface. Horia Geantă (4): ARM: dts: imx6sl: fix rng node ARM: dts: imx6sll: add rng ARM: dts: imx6ull: add rng hwrng: imx-rngc: enable driver for i.MX6 arch/arm/boot/dts/imx6sl.dtsi | 2 ++ arch/arm/boot/dts/imx6sll.dtsi | 7 +++++++ arch/arm/boot/dts/imx6ull.dtsi | 7 +++++++ drivers/char/hw_random/Kconfig | 2 +- 4 files changed, 17 insertions(+), 1 deletion(-)