From patchwork Tue Jun 9 10:45:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 199358 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D68A2C433E1 for ; Tue, 9 Jun 2020 10:46:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B53DC20812 for ; Tue, 9 Jun 2020 10:46:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="cSb5SjzB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728767AbgFIKpq (ORCPT ); Tue, 9 Jun 2020 06:45:46 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:1185 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728170AbgFIKpl (ORCPT ); Tue, 9 Jun 2020 06:45:41 -0400 X-UUID: 9e399d9c9c6247a6b5b8b0a046b5a56d-20200609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=5ak6B9yXDQG+uLwRfImrZ4YOAgSKcMnvfKkqDlCtExY=; b=cSb5SjzBUj4ISAuCics3f92/5QhVtl8yDQG7vW3xfESkUfLoc0ynCLA7gaO2EpvLu+pZ8PWmEjXCF0t9uqj0LEJP86UEvycMuUOCkVIP1Lk7q5oFD3jIgyfgNsFyLUBM0QlP0wGHIQHEHsKSLNcAt+DpjHhaNsPu1e4+KnVMQoQ=; X-UUID: 9e399d9c9c6247a6b5b8b0a046b5a56d-20200609 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 2070146149; Tue, 09 Jun 2020 18:45:37 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 9 Jun 2020 18:45:34 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 9 Jun 2020 18:45:34 +0800 From: Roger Lu To: Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd CC: Fan Chen , HenryC Chen , YT Lee , Xiaoqing Liu , Charles Yang , Angus Lin , Mark Rutland , Matthias Brugger , Nishanth Menon , Roger Lu , , , , , Subject: [PATCH v9 0/3] PM / AVS: SVS: Introduce SVS engine Date: Tue, 9 Jun 2020 18:45:30 +0800 Message-ID: <20200609104534.29314-1-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: F4A1B644A6F609D5CDCAC8C6F33835685D4DC4EB39D55BA2913EA8ECA89702732000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. SVS driver use OPP adjust event in [1] to update OPP table voltage part. 2. SVS dts node refers to CPU opp table [2] and GPU opp table [3]. 3. SVS and thermal dts use the same thermal efuse [4]. 4. SVS dts needs power-domain [5][6] and PMIC regulator [7]. [1] https://patchwork.kernel.org/patch/11193513/ [2] https://patchwork.kernel.org/patch/11304935/ [3] https://patchwork.kernel.org/patch/11423009/ [4] https://patchwork.kernel.org/patch/11316495/ [5] https://lore.kernel.org/patchwork/patch/1236875/ [6] https://lore.kernel.org/patchwork/patch/1236878/ [7] https://patchwork.kernel.org/patch/11284617/ pending discussion: - SVS sub-node architecture concern in below patch. https://lore.kernel.org/patchwork/patch/1175994/ changes since v8: - Add svs driver documentation for helping understand it - Make svs driver become a module_platform_driver() - Seperate svs debug feature from svs main driver Roger Lu (4): dt-bindings: power: avs: add mtk svs dt-bindings arm64: dts: mt8183: add svs device information PM / AVS: SVS: introduce SVS engine PM / AVS: SVS: add SVS debug commands .../bindings/power/avs/mtk_svs.yaml | 141 ++ arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 16 + arch/arm64/boot/dts/mediatek/mt8183.dtsi | 41 + drivers/power/avs/Kconfig | 10 + drivers/power/avs/Makefile | 1 + drivers/power/avs/mtk_svs.c | 2180 +++++++++++++++++ include/linux/power/mtk_svs.h | 23 + 7 files changed, 2412 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/avs/mtk_svs.yaml create mode 100644 drivers/power/avs/mtk_svs.c create mode 100644 include/linux/power/mtk_svs.h