From patchwork Mon Jun 8 08:14:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wan Ahmad Zainie X-Patchwork-Id: 199433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0369CC433DF for ; Mon, 8 Jun 2020 08:16:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CEAEE2076A for ; Mon, 8 Jun 2020 08:16:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729040AbgFHIQl (ORCPT ); Mon, 8 Jun 2020 04:16:41 -0400 Received: from mga09.intel.com ([134.134.136.24]:55228 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729033AbgFHIQl (ORCPT ); Mon, 8 Jun 2020 04:16:41 -0400 IronPort-SDR: pQdvUJQE8R7OAgqwrYb/YNq5uwxA1d4yIfzXeEK3OuFZTpoWASKrHIqsRJbWUbrIW4y98xJqLx URFx+eWfOMUw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2020 01:16:40 -0700 IronPort-SDR: y+gd4S9S0z9EMfWQWUY2h0Yop59C03M3/SxwLhOSEqyUFl/Kl2ro3sPt9V1obqtgCVHe3cni5V kPfDNsIFkm3w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,487,1583222400"; d="scan'208";a="417956152" Received: from wwanmoha-ilbpg2.png.intel.com ([10.88.227.42]) by orsmga004.jf.intel.com with ESMTP; 08 Jun 2020 01:16:38 -0700 From: Wan Ahmad Zainie To: kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, andriy.shevchenko@intel.com, adrian.hunter@intel.com, wan.ahmad.zainie.wan.mohamad@intel.com Subject: [PATCH v3 0/2] phy: intel: Add Keem Bay eMMC PHY support Date: Mon, 8 Jun 2020 16:14:59 +0800 Message-Id: <20200608081501.29558-1-wan.ahmad.zainie.wan.mohamad@intel.com> X-Mailer: git-send-email 2.17.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi. The first part is to document DT bindings for Keem Bay eMMC PHY. The second is the driver file, loosely based on phy-rockchip-emmc.c and phy-intel-emmc.c. The latter is not being reused as there are quite a number of differences i.e. registers offset, supported clock rates, bitfield to set. The patch was tested with Keem Bay evaluation module board. Thank you. Best regards, Zainie Changes since v2: - Modify DT example to use single cell for address and size. Changes since v1: - Rework phy-keembay-emmc.c to make it similar to phy-intel-emmc.c. - Use regmap_mmio, and remove reference to intel,syscon. - Use node name phy@.... - Update license i.e. use dual license. Wan Ahmad Zainie (2): dt-bindings: phy: intel: Add Keem Bay eMMC PHY bindings phy: intel: Add Keem Bay eMMC PHY support .../bindings/phy/intel,keembay-emmc-phy.yaml | 45 +++ drivers/phy/intel/Kconfig | 8 + drivers/phy/intel/Makefile | 1 + drivers/phy/intel/phy-keembay-emmc.c | 321 ++++++++++++++++++ 4 files changed, 375 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml create mode 100644 drivers/phy/intel/phy-keembay-emmc.c