From patchwork Mon May 18 09:24:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 200418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA47CC433DF for ; Mon, 18 May 2020 09:24:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ADBA2207D8 for ; Mon, 18 May 2020 09:24:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Va6hluz4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726130AbgERJYu (ORCPT ); Mon, 18 May 2020 05:24:50 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:62365 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726040AbgERJYu (ORCPT ); Mon, 18 May 2020 05:24:50 -0400 X-UUID: 38ef98bc9db2438b8e621db43415db51-20200518 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=0DTYtg7DH/aaZsHajF1M0GEhpPDj6HE4U9Su4EW4ZBg=; b=Va6hluz4/bYSptacD8bkhsa7nqDZ2RFMyTranQOalM8PvJkJFDufyvfFqfxrt16Eu3JTqNK1zXkkWjaYPe4/rTWrbAF32VKsT7VVlBavvczJ9jN19kkFozRrtllCR0Kyh2vL+FHwLlmDezX0unYUnglb0LuuuzxNYqAEFeq5e5w=; X-UUID: 38ef98bc9db2438b8e621db43415db51-20200518 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1124336748; Mon, 18 May 2020 17:24:48 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 18 May 2020 17:24:45 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 18 May 2020 17:24:45 +0800 From: Roger Lu To: Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd CC: Fan Chen , HenryC Chen , YT Lee , Xiaoqing Liu , Charles Yang , Angus Lin , Mark Rutland , Matthias Brugger , Nishanth Menon , Roger Lu , , , , , Subject: [PATCH v8 0/3] PM / AVS: SVS: Introduce SVS engine Date: Mon, 18 May 2020 17:24:01 +0800 Message-ID: <20200518092403.22647-1-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: 5934DDCDEAF0C437AC4DD8F51EBED5FD5EACA359D2BA842B5D2816D48513A4412000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. SVS driver use OPP adjust event in [1] to update OPP table voltage part. 2. SVS dts node refers to CPU opp table [2] and GPU opp table [3]. 3. SVS and thermal dts use the same thermal efuse [4]. 4. SVS dts needs power-domain [5][6] and PMIC regulator [7]. [1] https://patchwork.kernel.org/patch/11193513/ [2] https://patchwork.kernel.org/patch/11304935/ [3] https://patchwork.kernel.org/patch/11423009/ [4] https://patchwork.kernel.org/patch/11316495/ [5] https://lore.kernel.org/patchwork/patch/1236875/ [6] https://lore.kernel.org/patchwork/patch/1236878/ [7] https://patchwork.kernel.org/patch/11284617/ pending discussion: - SVS sub-node architecture concern in below patch. https://lore.kernel.org/patchwork/patch/1175994/ https://lore.kernel.org/patchwork/patch/1175994/ changes since v7: - Add "mtk_svs.yaml" for device-tree binding document. - Add svs_add_thermal_device_link() in driver for svs device (consumer) to link thermal device (supplier). - replace pm_qos_add_request() with cpu_latency_qos_add_request() for letting CPUs leave idle-off state. Roger Lu (3): dt-bindings: power: avs: add mtk svs dt-bindings arm64: dts: mt8183: add svs device information PM / AVS: SVS: Introduce SVS engine .../bindings/power/avs/mtk_svs.yaml | 141 ++ arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 16 + arch/arm64/boot/dts/mediatek/mt8183.dtsi | 41 + drivers/power/avs/Kconfig | 10 + drivers/power/avs/Makefile | 1 + drivers/power/avs/mtk_svs.c | 2119 +++++++++++++++++ include/linux/power/mtk_svs.h | 23 + 7 files changed, 2351 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/avs/mtk_svs.yaml create mode 100644 drivers/power/avs/mtk_svs.c create mode 100644 include/linux/power/mtk_svs.h