From patchwork Fri Apr 10 07:17:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Louis Kuo X-Patchwork-Id: 202215 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E8A9C2BA2B for ; Fri, 10 Apr 2020 07:17:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2392C208E4 for ; Fri, 10 Apr 2020 07:17:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="JZwCQi0B" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726654AbgDJHRl (ORCPT ); Fri, 10 Apr 2020 03:17:41 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:8319 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725858AbgDJHRl (ORCPT ); Fri, 10 Apr 2020 03:17:41 -0400 X-UUID: 7a06195a8f71485d999338faa905be88-20200410 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=vYfMs9/1iEBCtaElVkxErOIYD7/OvfRvtH3nKu3LNUQ=; b=JZwCQi0BcDi3Z/Px6HO/Sb4JfPtAETUG5+XDpnZ9t5up8b5JVB+7Cd4FZMWziy7OjyyMapao3XGo1fDzFRA/UeOxvEAmsrMtUDlq8hqqe/KzDO7nvgLxynIK6W8ZenUBsjUaMulM3YhU9mg7eNEKzI8S4S15saBk2iZPL/B434o=; X-UUID: 7a06195a8f71485d999338faa905be88-20200410 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1316574916; Fri, 10 Apr 2020 15:17:34 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 10 Apr 2020 15:17:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 10 Apr 2020 15:17:30 +0800 From: Louis Kuo To: , , , , , CC: , , , , , , , , , , , , , Subject: [RFC PATCH V6 0/3] media: support Mediatek sensor interface driver Date: Fri, 10 Apr 2020 15:17:20 +0800 Message-ID: <20200410071723.19720-1-louis.kuo@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This is the RFC patch adding Sensor Inferface(seninf) driver on Mediatek mt8183 SoC, which will be used in camera features on CrOS application. It belongs to the first Mediatek's camera driver series based on V4L2 and media controller framework. I posted the main part of the seninf driver as RFC to discuss first and would like some review comments on the overall structure of the driver. The driver is implemented with V4L2 framework. 1. Register as a V4L2 sub-device. 2. Only one entity with sink pads linked to camera sensors for choosing desired camera sensor by setup link and with source pads linked to cam-io for routing different types of decoded packet datas to PASS1 driver to generate sensor image frame and meta-data. The overall file structure of the seninf driver is as following: * mtk_seninf.c: Implement software and HW control flow of seninf driver. * mtk_seninf_reg.h: Define HW register R/W macros and HW register names. * mtk_seninf_rx_reg.h: Define HW RX register R/W macros and HW register names. [ V6: Change parse endpoints API, fix coding style, refine error handling and return value, remove redundant macros and header files] media: platform: mtk-isp: Add Mediatek sensor interface driver dt-bindings: mt8183: Add sensor interface dt-bindings dts: arm64: mt8183: Add sensor interface nodes .../bindings/media/mediatek-seninf.yaml | 219 +++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 25 + drivers/media/platform/Makefile | 1 + drivers/media/platform/mtk-isp/Kconfig | 18 + drivers/media/platform/mtk-isp/Makefile | 3 + .../media/platform/mtk-isp/seninf/Makefile | 5 + drivers/media/platform/mtk-isp/seninf/TODO | 18 + .../platform/mtk-isp/seninf/mtk_seninf.c | 1173 +++++++++++++ .../platform/mtk-isp/seninf/mtk_seninf_reg.h | 1491 +++++++++++++++++ .../mtk-isp/seninf/mtk_seninf_rx_reg.h | 1398 ++++++++++++++++ 10 files changed, 4351 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.yaml create mode 100644 drivers/media/platform/mtk-isp/Kconfig create mode 100644 drivers/media/platform/mtk-isp/Makefile create mode 100644 drivers/media/platform/mtk-isp/seninf/Makefile create mode 100644 drivers/media/platform/mtk-isp/seninf/TODO create mode 100644 drivers/media/platform/mtk-isp/seninf/mtk_seninf.c create mode 100644 drivers/media/platform/mtk-isp/seninf/mtk_seninf_reg.h create mode 100644 drivers/media/platform/mtk-isp/seninf/mtk_seninf_rx_reg.h