From patchwork Fri Dec 21 16:02:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 154397 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1086822ljp; Fri, 21 Dec 2018 08:02:50 -0800 (PST) X-Google-Smtp-Source: ALg8bN6XjY4Svt7/EavyogaW6xV39YzDRTEmRXhv00e5n9jYhYOpE/gZL8+sx7mXEEPZrioh/IZB X-Received: by 2002:a63:1d59:: with SMTP id d25mr2999129pgm.180.1545408170340; Fri, 21 Dec 2018 08:02:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545408170; cv=none; d=google.com; s=arc-20160816; b=HbKdPI1GODgQ8BVF9p0++5X8EIJeoC/O0/6czGHwo6j6N0SfmXyPmDAtUv7iKFAK+D RJxb91BXHD5rQ8rBuzvdKV5Rc6OOQLnlC5/fu4UnVu8BBjSXnxkpROxs9LWO34xuspoa Qlxo9PFDmaq3u9CjTNDC6sjhjzKIxYAZc6wbBZW+kszCUH7rQMtu0t/agIMR+NXvYoye METtcufbTDMdoEmwmP1w0MAhUYsj7DLUtNYvYWcuUg1i0seU6dtjniVfjWJokjFVntVh DJBzYW870hptyWH51yioJsc0ODdusiYczHOnfYglteNSxLnsyKZqSQSbFJ2MyTrlR6nf czVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=JuNbTUIJB2KQ1KWfbG11yHK+NOLYz3WFk+GRuq8n3EI=; b=O3S3FS35kPWXbFiysyAVqLyMfmYJrpB5OFpaFc7Gdz/i7uPRi4oFDY39BPHoDwp1Mf cPVetj7RUgRkbHBzIUZHt2vSW9fylfAqrk0EqzjxL9fXG/2sBjxVr1gXfxnjYoOcQuyn nW4WJmP+lvsOh5Eu14CoAK6a19bHj6KbI9WMiIxdfu6ESnL1tzWSA5IWMGFei/Bau4fX PkYL1N4ZcQTFaCooXeM/92rLwW2hbV177jS6btOlOPbTc7PkUYZB85kQApPVoZ7P/bD6 2ktZmh6HNDLECR0hXagcvWXAeFeCv3mlOl79blDXoTmBpLY67hLy0buoibjinU76Cj0J Zmvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=n8+A7sZg; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a20si845723pfh.163.2018.12.21.08.02.49; Fri, 21 Dec 2018 08:02:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=n8+A7sZg; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733173AbeLUQCt (ORCPT + 6 others); Fri, 21 Dec 2018 11:02:49 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:37779 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731945AbeLUQCt (ORCPT ); Fri, 21 Dec 2018 11:02:49 -0500 Received: by mail-wr1-f68.google.com with SMTP id s12so5780685wrt.4 for ; Fri, 21 Dec 2018 08:02:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JuNbTUIJB2KQ1KWfbG11yHK+NOLYz3WFk+GRuq8n3EI=; b=n8+A7sZgm6byDFHH6PhGFRlLlxdUy7mWfeO4fkzYkjf5jDCAvbo5ZLGGdMZxaJ5Ee9 03cjKQnkTPKjrvT8f23sG38aYPMvcFS5Mwyf+rQOFo6GYeNHBays80AUXv8HLWCICHES 1jQjfV6iPSwg87KQm1U82D+Kn1g8hX2QKaCVyw0vzfAgNtU6a1Rg73JOjVxJ30QFN4NR pLRg/axgJTb591/wbgiJTmzaeEerLXBOaZH/DxymkoQfphe9ASFhm4J9f/vxgbdoDbKt y6/TSyWYon2HHcAkYXWHBhuDKuJYFWFp60kADFx+tJbmNDBhzE7JLijzFFT0hilyJTho NzXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JuNbTUIJB2KQ1KWfbG11yHK+NOLYz3WFk+GRuq8n3EI=; b=HBsetjFKPPa+Iw4/Opg+T5n7+CrpALbCCvfppHsdB8q0uht8mvZoe3qoSYv4iL8x1K YbNw1ZX4lgcauHcppGjtXmpcZCXqRohqeDe/3NpRWyT6pfZzM3y+RiU7fj2y7F1Z7ia9 WGwon6tgO46rvW9xgdB6X32DTvL1NczQ6a1nEJx2omCLBnfbySSXgVkPzFDdmruyvsAl idogFh5NjiqRS6xXutfkEMwxcQ7PNDgdkdsU1V4izSvU3GF9+Zd1PknKfyaphJMmS7QC HPXaW0yCJw3r1sITriLh+iS16Cq/24lOKnvjBXT9/JeYKtTmjLQqh+v62XxkCVLDJtwf d4Ew== X-Gm-Message-State: AJcUukcz8Ar+L/K9P/gP/tr9rp2icAJP82H9jhRCX9TUjGOPrbYXdUd6 X/6L2veVWIKpreiexELhr8NdKA== X-Received: by 2002:a5d:5111:: with SMTP id s17mr3104693wrt.43.1545408167111; Fri, 21 Dec 2018 08:02:47 -0800 (PST) Received: from boomer.local ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id y138sm13044021wmc.16.2018.12.21.08.02.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 21 Dec 2018 08:02:46 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 0/5] clk: meson: axg: add 32k clock generation Date: Fri, 21 Dec 2018 17:02:34 +0100 Message-Id: <20181221160239.26265-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The goal of this patchset is to add the internal generation of the 32768Hz clock within the axg AO clock controller. This was initially added has the CEC clock on gxbb. To properly integrate it on the axg, a simpler 'dual divider' driver is added. Then gxbb AO clock controller is reworked to use it. Finally the 32k clock tree is added to the AXG. This patchset *no longer* requires depends on this CCF change [0]. There is a work around in place until a solution gets merged in the framework. Changes since v1: [1] * Add work around for [0] in gxbb-aoclk [0]: https://lkml.kernel.org/r/20181204163257.32085-1-jbrunet@baylibre.com [1]: https://lkml.kernel.org/r/20181204165310.20806-1-jbrunet@baylibre.com Jerome Brunet (5): dt-bindings: clk: meson: add ao slow clock path ids clk: meson: clean-up clock registration clk: meson: add dual divider clock driver clk: meson: gxbb-ao: replace cec-32k with the dual divider clk: meson: axg-ao: add 32k generation subtree drivers/clk/meson/Makefile | 4 +- drivers/clk/meson/axg-aoclk.c | 175 +++++++++++++++-- drivers/clk/meson/axg-aoclk.h | 13 +- drivers/clk/meson/clk-dualdiv.c | 130 ++++++++++++ drivers/clk/meson/clkc.h | 19 ++ drivers/clk/meson/gxbb-aoclk-32k.c | 193 ------------------ drivers/clk/meson/gxbb-aoclk.c | 251 +++++++++++++++++++----- drivers/clk/meson/gxbb-aoclk.h | 20 +- drivers/clk/meson/meson-aoclk.c | 15 +- include/dt-bindings/clock/axg-aoclkc.h | 7 +- include/dt-bindings/clock/gxbb-aoclkc.h | 7 + 11 files changed, 540 insertions(+), 294 deletions(-) create mode 100644 drivers/clk/meson/clk-dualdiv.c delete mode 100644 drivers/clk/meson/gxbb-aoclk-32k.c -- 2.19.2