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[v2,0/5] clk: meson: axg: add 32k clock generation

Message ID 20181221160239.26265-1-jbrunet@baylibre.com
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Series clk: meson: axg: add 32k clock generation | expand

Message

Jerome Brunet Dec. 21, 2018, 4:02 p.m. UTC 
The goal of this patchset is to add the internal generation of the
32768Hz clock within the axg AO clock controller.

This was initially added has the CEC clock on gxbb. To properly
integrate it on the axg, a simpler 'dual divider' driver is added.
Then gxbb AO clock controller is reworked to use it. Finally the 32k
clock tree is added to the AXG.

This patchset *no longer* requires depends on this CCF change [0].
There is a work around in place until a solution gets merged in
the framework.

Changes since v1: [1]
 * Add work around for [0] in gxbb-aoclk

[0]: https://lkml.kernel.org/r/20181204163257.32085-1-jbrunet@baylibre.com
[1]: https://lkml.kernel.org/r/20181204165310.20806-1-jbrunet@baylibre.com

Jerome Brunet (5):
  dt-bindings: clk: meson: add ao slow clock path ids
  clk: meson: clean-up clock registration
  clk: meson: add dual divider clock driver
  clk: meson: gxbb-ao: replace cec-32k with the dual divider
  clk: meson: axg-ao: add 32k generation subtree

 drivers/clk/meson/Makefile              |   4 +-
 drivers/clk/meson/axg-aoclk.c           | 175 +++++++++++++++--
 drivers/clk/meson/axg-aoclk.h           |  13 +-
 drivers/clk/meson/clk-dualdiv.c         | 130 ++++++++++++
 drivers/clk/meson/clkc.h                |  19 ++
 drivers/clk/meson/gxbb-aoclk-32k.c      | 193 ------------------
 drivers/clk/meson/gxbb-aoclk.c          | 251 +++++++++++++++++++-----
 drivers/clk/meson/gxbb-aoclk.h          |  20 +-
 drivers/clk/meson/meson-aoclk.c         |  15 +-
 include/dt-bindings/clock/axg-aoclkc.h  |   7 +-
 include/dt-bindings/clock/gxbb-aoclkc.h |   7 +
 11 files changed, 540 insertions(+), 294 deletions(-)
 create mode 100644 drivers/clk/meson/clk-dualdiv.c
 delete mode 100644 drivers/clk/meson/gxbb-aoclk-32k.c

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2.19.2