From patchwork Wed Nov 28 13:50:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 152253 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1113165ljp; Wed, 28 Nov 2018 05:51:21 -0800 (PST) X-Google-Smtp-Source: AFSGD/VT4xAe1UVz/G/4ykFvsMAyIQdvwe18XEouObDJWb49m6TxKNLArFSyScW7ILYjWJUMAfI+ X-Received: by 2002:a65:5286:: with SMTP id y6mr33227951pgp.439.1543413081538; Wed, 28 Nov 2018 05:51:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543413081; cv=none; d=google.com; s=arc-20160816; b=UuUjw48UbALfzUSF4wUZII10VKpp1ZqOi3A4dKUuofs9Op7OTf+rZFQFm6g3toDTfK 7e6t6Vj46vqUoV6vrB/ojzOsUP6wbhlktv5CXi1zN9Tx4eK0dFodraRQuLQfavGVsY4o 5EHyHfuiyYhmwj1McVHW9SaQPD5+Po7rj34sTX2FujXsr6/0AOMNus8l1BOtxpMlw/Zc DsKmo7GPlNgyIySrO2OI/1yEFN1vnBnydma5ZUiO8cVX11F4xnWN/IgxnmC4Zp+HsCRD BaNeybZreVX1soCHmTMZdQpLQ+eFFXAaC4Jdo9CASGJ2SU8VqRFaZIP+2jzfQs0cN0ze Qjlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=I50nFMd9URCppMyU0fPjpiiOmYaN9MjB3/vOqwqOX2s=; b=OFX9oKZTVeqi+oHlJ8ggZYHD1z87zDHbOpQ9htn+v7KPgZF7IH6xiU3PgcF70GIiMp hi3eQcJLJpHiDeLtySxBEvbUM4uTn9tM809BQFKH+iYbz+1yypFoD3WAk9nxo1tYxrnI 1BfACzOqn+OwtchZTt4HRAf73RJgeJFSySdAzRTmWHTHxQfuVa1mZz7oV9hluCcf4wUQ H4IGPBKii1OADE1y3Hh+GKaNv9TEbV3amtX9mk9ZE61cQ7YHR8xz3w/K2ENK+XDEqt0+ Fqjk8zfzL2/cJ9wi8Q4Sa/2SW6Q68KE1uBdNRMl7WqTIXP8JD1VjT5UuWZZnXZVNY8Qe sjgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EI0hnTpU; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y17si7172163pgh.353.2018.11.28.05.51.21; Wed, 28 Nov 2018 05:51:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EI0hnTpU; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728223AbeK2AxD (ORCPT + 6 others); Wed, 28 Nov 2018 19:53:03 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:44742 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727802AbeK2AxD (ORCPT ); Wed, 28 Nov 2018 19:53:03 -0500 Received: by mail-pf1-f195.google.com with SMTP id u6so10194486pfh.11 for ; Wed, 28 Nov 2018 05:51:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=I50nFMd9URCppMyU0fPjpiiOmYaN9MjB3/vOqwqOX2s=; b=EI0hnTpU9X9vZw8Ik6X/3OhI0Zjsqa3tNIZnJX5VsDh2U5EuCb5FZhkg8meAZSKM0q Men+WDGiLJNZiNk2z3ffxQz6eXfGLhOTjqkKWEN1feKK/TSuuGu8h1JgojI/QpyEzcvm 1qGPGj9DDsu7uWIS9P3tz71RKJOLbgYhNz5nI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=I50nFMd9URCppMyU0fPjpiiOmYaN9MjB3/vOqwqOX2s=; b=hFrUUjWeAHGSBYukW6O5es8jkVKP2tef6/ChcQNSAGSgpFgk/a+cIPyybNXnH0QYw+ LEV+jAdOZgjJgQ/83sxbh39ewEPZnEhqPVLzczGnS0kSnKHwvSEcka/3YqCTshnKmpoX izcSluElLeSaLBr79neZ0WtylQPlvqGpdj0pO8swuOLd1scCK2qSnMVrLYdNiwokDr3k /n7wP0pPrDz7E9junh8CUKl8Fgjt2EvMqCFid/8CjhE9dj1SbpECO80Is2mm8tMrdYKk zxkhIyt9GjETxjRuNq+U6PBlVYfs5m8XyWpUV6NzXIklBwdi0MK+6jkQok9t7j2IPCEz oA0Q== X-Gm-Message-State: AGRZ1gKYOk60caktqEWJuqyE9kp7nQLVjq/cVqa+a4Kn/FBBDnivSDxD 3Qm5UZSMmbYpkVX2E2rNdKJb X-Received: by 2002:a62:2606:: with SMTP id m6mr36686869pfm.133.1543413079570; Wed, 28 Nov 2018 05:51:19 -0800 (PST) Received: from localhost.localdomain ([2409:4072:90a:a93f:b481:6fae:6692:c3ee]) by smtp.gmail.com with ESMTPSA id c4sm22049854pfm.151.2018.11.28.05.51.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 05:51:18 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, overseas.sales@unisoc.com, Manivannan Sadhasivam Subject: [PATCH v3 00/15] Add initial RDA8810PL SoC and Orange Pi boards support Date: Wed, 28 Nov 2018 19:20:51 +0530 Message-Id: <20181128135106.9255-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This patchset adds initial RDA8810PL SoC and Orange Pi boards (2G IoT and i96) support. RDA8810PL is an ARM Cortex A5 based SoC with Vivante's GC860 GPU. The SoC has been added as a new ARM sub architecture with myself and Andreas as the maintainers. More information about the boards can be found in below links: 1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/ 2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/ This patchset is based on the initial revision sent out by Andreas long back (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-June/515951.html). I have extended his patchset with proper irqchip and UART drivers. Now, boards can boot into initramfs with console at UART2. Thanks, Mani Changes in v3: As per Marc's review: * Removed unused header and defines from irqchip driver. * Removed setting flow handlers from set_type callback. * Minor code cleanups. As per Arnd's review: * Modified the UART indexes to start from 1 to match the SoC numbering * Enabled exposed UARTs (all 3 on both boards) * Modified the serial aliases as per board numbering * Added Greg's Reviewed-by tag for serial driver. Changes in v2: * Used readl/writel_relaxed calls for both irqchip and timer drivers as per Marc's review. * Implemented the logic to prevent counter wrapping during read as suggested by Marc. * Used the timer-of API as per Daniel's suggestion. * Added description about the timer in both commit log and driver. * Changed the Vendor name for RDA to Unisoc Communications Inc. * Removed the soc node level and cleaned up devicetrees as per Rob's review. * Merged interrupt controller DT patch to SoC. * Moved aliases to board dts as per Arnd's suggestion. * Removed RDA Micro support mail address and used Unisoc one and added my missing signed off by tag as per Andreas's comments. Andreas Färber (4): dt-bindings: Add RDA Micro vendor prefix dt-bindings: arm: Document RDA8810PL and reference boards ARM: Prepare RDA8810PL SoC dt-bindings: serial: Document RDA Micro UART Manivannan Sadhasivam (11): dt-bindings: interrupt-controller: Document RDA8810PL intc arm: dts: Add devicetree for RDA8810PL SoC arm: dts: Add devicetree for OrangePi 2G IoT board arm: dts: Add devicetree for OrangePi i96 board irqchip: Add RDA8810PL interrupt driver dt-bindings: timer: Document RDA8810PL SoC timer arm: dts: rda8810pl: Add timer support clocksource: Add clock driver for RDA8810PL SoC arm: dts: rda8810pl: Add interrupt support for UART tty: serial: Add RDA8810PL UART driver MAINTAINERS: Add entry for RDA Micro SoC architecture .../admin-guide/kernel-parameters.txt | 6 + Documentation/devicetree/bindings/arm/rda.txt | 17 + .../interrupt-controller/rda,8810pl-intc.txt | 61 ++ .../bindings/serial/rda,8810pl-uart.txt | 15 + .../bindings/timer/rda,8810pl-timer.txt | 21 + .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 14 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + .../boot/dts/rda8810pl-orangepi-2g-iot.dts | 50 ++ arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 50 ++ arch/arm/boot/dts/rda8810pl.dtsi | 99 +++ arch/arm/mach-rda/Kconfig | 9 + arch/arm/mach-rda/Makefile | 1 + drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-rda.c | 195 ++++ drivers/irqchip/Kconfig | 4 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-rda-intc.c | 107 +++ drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 25 files changed, 1520 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rda.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt create mode 100644 Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi create mode 100644 arch/arm/mach-rda/Kconfig create mode 100644 arch/arm/mach-rda/Makefile create mode 100644 drivers/clocksource/timer-rda.c create mode 100644 drivers/irqchip/irq-rda-intc.c create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1 Reviewed-by: Rob Herring