From patchwork Thu Aug 23 10:33:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 144900 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp24022ljw; Thu, 23 Aug 2018 03:33:45 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwVWWvKJmJpVsJd86/mQmIniIT+w5flz4k/JKH2nkSSs8nr7gLI+JkVNxg2ZkoHi7XZkmgx X-Received: by 2002:a62:c0a:: with SMTP id u10-v6mr62158649pfi.43.1535020425057; Thu, 23 Aug 2018 03:33:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535020425; cv=none; d=google.com; s=arc-20160816; b=Q6ZfZF1HTxFnwFBoVnPhpRAx6YAifiaJv2qksssyeNN42L01gbq4akta+bYjjy0Wdu VavfZ7uKtfShrh/ucySruOGD9aROuhKRyyy6saZWDENziH/JoyIyv33eLX3Q0BGtU9ZQ FCwYjaz0oyeoZwhTdUzFd+8xHJFsTUJzmdXOyTUG+P1IGmRHhi7VwBP68yqp1onGMmTq SjVgc1y/oTRR+mwzdv7ZkqqjN57u0pOmYJfbOn53JLz4jn8wW0TgkZlDW2vdMNy4ybsX KRJG/+2j4wC9v5Vo5ZeVTcyNKkdP+XjVpfbyy4IbBUvvZ3d4SWiOWRisA90IymNkOLo3 e4iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=4uFkuQQ8zMkHzsmdEuz5Wp4jpOEExfjs39PvLvo27SI=; b=p1j279ba78DptFzpGOR+eIC1MFebkqrLGHZskbOCPxqmRgRQnQaFQ5iPTsLsaDeAa5 sDNErQZq2TFwS5DtnrlymXlPJBVXEaQxRS9qZ6Z4sFNQzXrkSgoN1Kmmok/fIq/gR6d4 0u04qUGgelr9NWEI9NrHHSZUXTlBZzO/UhsHf9QWYmT7+Yj6ZDj1WtKu4Yndoeslc7c3 hVpdAt9qcC621y8vf8kpjRpuWImJAdSI3i47THqvUF+kcMp+ZPSgcMhW/QIfWhjEd8mU rwZG2qnD3U909A1FtPDTCdhhnX9Gp9iliOp4My4ySK7gmkO6699vVDt2mvrJCi1oNOa4 7duQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ekt9hBVJ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 5-v6si4040393pls.431.2018.08.23.03.33.44; Thu, 23 Aug 2018 03:33:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ekt9hBVJ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726324AbeHWOCr (ORCPT + 6 others); Thu, 23 Aug 2018 10:02:47 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:39162 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727823AbeHWOCr (ORCPT ); Thu, 23 Aug 2018 10:02:47 -0400 Received: by mail-lf1-f68.google.com with SMTP id j201-v6so3680732lfg.6 for ; Thu, 23 Aug 2018 03:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=4uFkuQQ8zMkHzsmdEuz5Wp4jpOEExfjs39PvLvo27SI=; b=ekt9hBVJ5yLveQx7OMOfioUf+w8hKOJAltCky/vvNqKzeLlZroQUtvzC5dlS/FOGRK YMLQ6onsl5KPgQVLFpEtKQZCfLR8ELzZkPb2VihTIvhlv0sJ3qabeVfODzSasFhJD7D2 Qg9hsH40nkrx9QJktfn6nEGp7qsNK3/F5L54s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4uFkuQQ8zMkHzsmdEuz5Wp4jpOEExfjs39PvLvo27SI=; b=GiN3JczDjfQsZsaEj9vplcVi853gXemPUHAT9psCK14c4USIYqARlfanK31IavGFig Qjg+IA4w4EqQZ+0nknRKhfJHMcZK28wji6MxYix7BD9nCO7ryrnuBdBpTpXDbisWnyaB RPYqtS1zm+pIx5CDVkqxIza+s6nPl5tqvbvM2eUqY0aavvvZughFRaOqM0EBXnvlMe6s mxLDSjXm60AHzxxMVWfJ87qLgLIU6lPQ66WZwCLruqY9FRFdIbc0FjwC7UfRggKFsAQH pd+rEW1LEodjn+lMdz8wCLvX4MD/xUZGyizKaYf/A3VyZSXlEzIrrwRzG2H7j7vLzixe +Wyg== X-Gm-Message-State: AOUpUlGfdvM2SmXVO03iDHKHNrfMpaub5XraO+8zqgvLJpUc/DQY3XH4 8WxjBJ6/kYuz0fwAN0aM8GPsQg== X-Received: by 2002:a19:c5:: with SMTP id 188-v6mr19130608lfa.45.1535020422001; Thu, 23 Aug 2018 03:33:42 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id s74-v6sm556898lfg.79.2018.08.23.03.33.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 23 Aug 2018 03:33:40 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, dev@lists.96boards.org Cc: John Stultz , Manivannan Sadhasivam , Rob Herring , Mark Rutland , Frank Rowand , Mark Brown , Michal Simek , Andy Shevchenko , Mika Westerberg , Arnd Bergmann , Linus Walleij Subject: [PATCH 0/4 v1] Mezzanine Low Speed connector bus Date: Thu, 23 Aug 2018 12:33:28 +0200 Message-Id: <20180823103332.32047-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org I have been a bit hesitant to reiterate the series, but this is anyways a v1 of the 96Boards Mezzanine Low Speed connector driver framework. I know the boards have a high speed connector as well, just trying to work stepwise and do the simple things first. What convinced me to continue was very real usecases that exist today, as this makes the secure96 Mezzanine work: - Get something upstream that makes it possible to without any trouble or extensive ugly hacking probe and use the secure96 mezzanine. This is motivated by the IoT design space which needs a way to plug in proper security and the secure96 offers a TPM chip for root of trust and key handling. - A clear indication that the same approach will work just as fine with ACPI without reinventing the universe. I do not have a definitive proof of this, but it is more plausible that this will be reusable for ACPI than any of the DT-centric ideas I've seen for populating daughterboards. There are 96boards using ACPI today. A secure96 TPM is desireable for things like the ARM developer box which has this LS connector: https://www.96boards.org/product/developerbox/ - Some indication that binding the connector like this will not implicate or screw things up for the DT-overlays idea, i.e. a both/and and not either/or approach. The idea is for this to go upstream through ARM SoC the day noone actively NACK it and someone actively ACK it. Expect some more iterations. Linus Walleij (4): eeprom: at24: Allow passing gpiodesc from pdata spi: Make of_find_spi_device_by_node() available bus: Add DT bindings for 96Boards low speed connector bus: 96boards Low-Speed Connector .../bus/96boards,low-speed-connector.txt | 50 +++ drivers/bus/Kconfig | 2 + drivers/bus/Makefile | 4 +- drivers/bus/daughterboards/96boards-ls-bus.c | 39 ++ .../daughterboards/96boards-ls-connector.c | 367 ++++++++++++++++++ .../bus/daughterboards/96boards-mezzanines.h | 77 ++++ .../bus/daughterboards/96boards-secure96.c | 265 +++++++++++++ drivers/bus/daughterboards/Kconfig | 50 +++ drivers/bus/daughterboards/Makefile | 6 + drivers/misc/eeprom/at24.c | 6 +- drivers/spi/spi.c | 33 +- include/linux/platform_data/at24.h | 2 + include/linux/spi/spi.h | 4 + 13 files changed, 888 insertions(+), 17 deletions(-) create mode 100644 Documentation/devicetree/bindings/bus/96boards,low-speed-connector.txt create mode 100644 drivers/bus/daughterboards/96boards-ls-bus.c create mode 100644 drivers/bus/daughterboards/96boards-ls-connector.c create mode 100644 drivers/bus/daughterboards/96boards-mezzanines.h create mode 100644 drivers/bus/daughterboards/96boards-secure96.c create mode 100644 drivers/bus/daughterboards/Kconfig create mode 100644 drivers/bus/daughterboards/Makefile -- 2.17.0