From patchwork Thu Jul 26 05:06:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 142922 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp24072ljj; Wed, 25 Jul 2018 22:07:20 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfXmyWdvwdKpBh6+gloFkxlv/sz11UTW4yzqqbFM7r3OBsPidA411UtH1GxCDOFoZrBzcN9 X-Received: by 2002:a63:383:: with SMTP id 125-v6mr473456pgd.421.1532581640601; Wed, 25 Jul 2018 22:07:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532581640; cv=none; d=google.com; s=arc-20160816; b=HmicwGJvDm4VAVdGE3WuIUrf95gF1L54HsPK5Vs2U7jAoawhGsZV40WyYnjy+v48AZ TLmqQUGfYjXXngrUYqvawsXqt/nmoK9sg3H4Y1h48/wSW0kccVPY9zOCGAi3WE1WUMqi TECwWpVSx6i0ssvMUskK12kwuHiyjBSerKRq6jW2lvG3cW6NI9fU2xlriwUhbexad03H 47Bye+Qq1ZWShNVG3DZ/8To7WdcMRUbFMH3bQuf0SlhAHEfqENCevie7CcBXEbnC/e7q PTswtIdvIqzYB+m/GBOgT4mW81CwNsRf+MwIys2s3bq6AtkgQSf056LMDDP3D2I1lAqJ KXQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=ldZNa5YyckUOu8oNb1eCqtYWZcp8eh8/jZO6h8bTSt4=; b=zRZR/4oe5z9WkBMWzCqz1eewtcDW0X1BpXfPr9pq4d1d4D1vrsOfzjyXWTl+M2fBHt WlTs1eh1rMF3KBlC9GLbEF1A9DydBK3gN8ezY6k7RMJOCgipbyVTEipeBSAQn+6aWtpO LusvYEIm+6g1RYDKVU9Qpi4+8se8wsUtikiEpmg1M8AE1AEnOaGanOdEgVl55YA9cgKZ wevAo2ITWJitnaRfkIxPQV/xq4xVBqpGk0c5+k5/ZkhRNs3XxpFuxmasZ7PgEGA5zdLC BMHHbhkB/XwT11SaSyFXLnK8Gb2C/DN9mQ7XbQd4Wmj3qEnUrZR1B+nska7kBkty8BD9 CZ4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=C8aknY5S; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o61-v6si420307pld.109.2018.07.25.22.07.20; Wed, 25 Jul 2018 22:07:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=C8aknY5S; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728750AbeGZGWV (ORCPT + 3 others); Thu, 26 Jul 2018 02:22:21 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:34324 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726421AbeGZGWU (ORCPT ); Thu, 26 Jul 2018 02:22:20 -0400 Received: by mail-pg1-f194.google.com with SMTP id y5-v6so375774pgv.1 for ; Wed, 25 Jul 2018 22:07:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=ceFnTmxQPfvKFlcjJPNf0KRAmeXXOimer6WKQOqkrlU=; b=C8aknY5SanwLy8gCmCVLLiCcUu3Cxsh/nOm/vEz0gG68vzZMiZuEyKU99qN4GAglRG XDUxRjtibmr4GCePjDdD7msZc0gGGwuepLMlH8qRgk2tply7NzUpJ+RZ5WLBT1xS59Ng R31yfa6rJGYmJp7b91+cmz90I+iA4XIWUexqM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ceFnTmxQPfvKFlcjJPNf0KRAmeXXOimer6WKQOqkrlU=; b=iQnKFi5Ie0HexHU91S2MgobTdl8iAnFlCvuIP8+vupFkwQdzgc8QNtA8HUnouCqVgt dsD8XtsqSiJa1svuDd/aPxMgfU+0AxhBGEsKSy2qCWiZp6clx7oonEl2sgp+20Ytsmyg ji2ym5YL36w1D0U8dZ9p3rJYwDUxbXI8jcNDhma1ywwHfFz0HQVwaIKRGlW1zrnTNbxy kCClH5fzJtQYGPkTtcepKTocJTlXVOTUaVuSwroqVTzVpNYRCXKzs1+XXBwpM2tnjsLp 1wx3fFxFn/O0nuyFSfR5ZXdCOvypake6NWj0fm/p8yGng/XsFnIq6H0XZKZzIpQCoLs2 MN+A== X-Gm-Message-State: AOUpUlHz5YANUEH+gdn/ZvSRuA4ZwaubIcvjuiwwd6ldMgl5qHSFAyla g+aTXt7VtzSK7v31iHRYOlhX X-Received: by 2002:a63:dc53:: with SMTP id f19-v6mr537108pgj.56.1532581639030; Wed, 25 Jul 2018 22:07:19 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6208:6a6e:a8cb:6394:3bdf:2b97]) by smtp.gmail.com with ESMTPSA id y4-v6sm492540pfm.137.2018.07.25.22.07.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Jul 2018 22:07:18 -0700 (PDT) From: Manivannan Sadhasivam To: vkoul@kernel.org, dan.j.williams@intel.com, afaerber@suse.de, robh+dt@kernel.org, dmaengine@vger.kernel.org, liuwei@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br Cc: Manivannan Sadhasivam Subject: [PATCH v3 0/4] Add Actions Semi Owl family S900 DMA Controller support Date: Thu, 26 Jul 2018 10:36:54 +0530 Message-Id: <20180726050658.1399-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This patchset adds DMA controller support for Actions Semi Owl family S900 SoC. This driver has been structured in a way such that there will be only one controller driver for the whole Owl family series (S500, S700 and S900 SoCs). There are 12 physical channels and 46 logical channels supported by the DMA controller. The DMA controller also supports 4 software configurable interrupt lines for the priority based DMA usecase. But the DMA driver supports only 1 interrupt for simplification. By default, the driver uses Linked list mode for all transfers. Right now only MEMCPY support has been added and the rest (SLAVE, CYCLIC) will be added in upcoming patches. The driver has been tested using dmatest utility on the Bubblegum-96 board. The DTS patches in this series depends on the pinctrl DTS patches submitted [1], which is yet to be merged by the platform maintainer Andreas. Since the DMA driver goes through DMA tree and the relevant DTS patches goes through ARM-SoC tree, Andreas will pick it up once it has been reviewed. For the reference, I have queued up all reviewed dts patches so far in my repo [2] from which Andreas is picking them for 4.19. Thanks, Mani [1] https://patchwork.kernel.org/patch/10322937/ [2] https://git.linaro.org/people/manivannan.sadhasivam/linux.git/log/?h=s900-for-next Changes in v3: As per Vinod's review: * Removed unused header and API's * Used GENMASK for defines * Removed per member comment for structs * Modified pchan* and dma* API's to use corresponding containers as arguments * Removed error messages regarding the no free channels * Added devm_free_irq in dma_remove * Used dmaengine instead of dma for commit titles Changes in v2: * Fixed up the multi-line alignments according to `checkpatch --strict` Manivannan Sadhasivam (4): dt-bindings: dmaengine: Add binding for Actions Semi Owl SoCs arm64: dts: actions: Add Actions Semi S900 DMA Controller dmaengine: Add Actions Semi Owl family S900 DMA driver MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver .../devicetree/bindings/dma/owl-dma.txt | 47 + MAINTAINERS | 2 + arch/arm64/boot/dts/actions/s900.dtsi | 13 + drivers/dma/Kconfig | 8 + drivers/dma/Makefile | 1 + drivers/dma/owl-dma.c | 971 ++++++++++++++++++ 6 files changed, 1042 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt create mode 100644 drivers/dma/owl-dma.c -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Rob Herring